| /dports/science/dakota/dakota-6.13.0-release-public.src-UI/packages/external/LHS/ |
| H A D | Normal.f90 | 50 PMU=(A+B)/2.
51 SIG=(B-PMU)/3.0902323062
57 READ (8) PMU,SIG
65 PMU=LOG(PMEAN)-0.5*SIG*SIG
69 READ (8) PMU,SIG,ABOT,ATOP
77 PMU=LOG(PMEAN)-0.5*SIG*SIG
85 READ (8) PMU,SIG,ALOBND,AHIBND
97 PMU=LOG(PMEAN)-0.5*SIG*SIG
110 RESHI=FINVNOR(BHI)*SIG+PMU-AHIBND
114 RESLO=FINVNOR(BL1)*SIG+PMU-AHIBND
[all …]
|
| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/AcpiTables/Dsdt/ |
| H A D | PchXdci.asl | 55 // Set PMU Power State
58 // Arg1: 0x03 Enable PMU PME
59 // 0x00 Clear PMU PME
70 PUPS, 2, // PMU power state
72 PURC, 1, // Reset PMU core
86 // Clear PMU PME
152 // Set/Clear PMU PME
174 // Function 4: Set PMU Power State Method, clear PMU PME
182 // Set PMU to Dx state and clear PMU PME
243 // 0: PMU is in D0 state
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/perf/ |
| H A D | Kconfig | 10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
45 tristate "Arm CMN-600 PMU support"
53 bool "ARM PMU framework"
73 tristate "ARM DynamIQ Shared Unit (DSU) PMU"
90 bool "Qualcomm Technologies L2-cache PMU"
96 Adds the L2 cache PMU into the perf events subsystem for
100 bool "Qualcomm Technologies L3-cache PMU"
106 Adds the L3 cache PMU into the perf events subsystem for
110 tristate "Cavium ThunderX2 SoC PMU UNCORE"
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/perf/ |
| H A D | Kconfig | 10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
45 tristate "Arm CMN-600 PMU support"
53 bool "ARM PMU framework"
73 tristate "ARM DynamIQ Shared Unit (DSU) PMU"
90 bool "Qualcomm Technologies L2-cache PMU"
96 Adds the L2 cache PMU into the perf events subsystem for
100 bool "Qualcomm Technologies L3-cache PMU"
106 Adds the L3 cache PMU into the perf events subsystem for
110 tristate "Cavium ThunderX2 SoC PMU UNCORE"
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/perf/ |
| H A D | Kconfig | 10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
45 tristate "Arm CMN-600 PMU support"
53 bool "ARM PMU framework"
73 tristate "ARM DynamIQ Shared Unit (DSU) PMU"
90 bool "Qualcomm Technologies L2-cache PMU"
96 Adds the L2 cache PMU into the perf events subsystem for
100 bool "Qualcomm Technologies L3-cache PMU"
106 Adds the L3 cache PMU into the perf events subsystem for
110 tristate "Cavium ThunderX2 SoC PMU UNCORE"
[all …]
|
| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ |
| H A D | Hi1620Mbig.asl | 11 //This is for S0-TB-L3T0 PMU implementation
40 //This is for S0-TB-L3T1 PMU implementation
69 //This is for S0-TB-L3T2 PMU implementation
98 //This is for S0-TB-L3T3 PMU implementation
127 //This is for S0-TB-L3T4 PMU implementation
156 //This is for S0-TB-L3T5 PMU implementation
185 //This is for S0-TB-DDRC0 PMU implementation
214 //This is for S0-TB-DDRC1 PMU implementation
301 //This is for S0-TB-HHA0 PMU implementation
330 //This is for S0-TB-HHA1 PMU implementation
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/Documentation/admin-guide/perf/ |
| H A D | xgene-pmu.rst | 2 APM X-Gene SoC Performance Monitoring Unit (PMU)
5 X-Gene SoC PMU consists of various independent system device PMUs such as
7 controller(s). These PMU devices are loosely architected to follow the
8 same model as the PMU for ARM cores. The PMUs share the same top level
11 PMU (perf) driver
14 The xgene-pmu driver registers several perf PMU drivers. Each of the perf
24 Most of the SoC PMU has a specific list of agent ID used for monitoring
26 a specific CPU or an I/O bridge. Each PMU has a set of 2 registers capable of
32 each PMU, please refer to APM X-Gene User Manual.
40 l3c0/ackq-full/ [Kernel PMU event]
[all …]
|
| H A D | hisi-pmu.rst | 2 HiSilicon SoC uncore Performance Monitoring Unit (PMU)
15 HiSilicon SoC uncore PMU driver
19 interrupt, and the PMU driver shall register perf PMU drivers like L3C,
27 Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU
39 ID used to count the uncore PMU event.
44 hisi_sccl3_l3c0/rd_hit_cpipe/ [kernel PMU event]
46 hisi_sccl3_l3c0/wr_hit_cpipe/ [kernel PMU event]
48 hisi_sccl1_l3c0/rd_hit_cpipe/ [kernel PMU event]
50 hisi_sccl1_l3c0/wr_hit_cpipe/ [kernel PMU event]
108 the total counter values in the PMU counters.
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/admin-guide/perf/ |
| H A D | xgene-pmu.rst | 2 APM X-Gene SoC Performance Monitoring Unit (PMU)
5 X-Gene SoC PMU consists of various independent system device PMUs such as
7 controller(s). These PMU devices are loosely architected to follow the
8 same model as the PMU for ARM cores. The PMUs share the same top level
11 PMU (perf) driver
14 The xgene-pmu driver registers several perf PMU drivers. Each of the perf
24 Most of the SoC PMU has a specific list of agent ID used for monitoring
26 a specific CPU or an I/O bridge. Each PMU has a set of 2 registers capable of
32 each PMU, please refer to APM X-Gene User Manual.
40 l3c0/ackq-full/ [Kernel PMU event]
[all …]
|
| H A D | hisi-pmu.rst | 2 HiSilicon SoC uncore Performance Monitoring Unit (PMU)
15 HiSilicon SoC uncore PMU driver
19 interrupt, and the PMU driver shall register perf PMU drivers like L3C,
27 Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU
39 ID used to count the uncore PMU event.
44 hisi_sccl3_l3c0/rd_hit_cpipe/ [kernel PMU event]
46 hisi_sccl3_l3c0/wr_hit_cpipe/ [kernel PMU event]
48 hisi_sccl1_l3c0/rd_hit_cpipe/ [kernel PMU event]
50 hisi_sccl1_l3c0/wr_hit_cpipe/ [kernel PMU event]
108 the total counter values in the PMU counters.
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/admin-guide/perf/ |
| H A D | xgene-pmu.rst | 2 APM X-Gene SoC Performance Monitoring Unit (PMU)
5 X-Gene SoC PMU consists of various independent system device PMUs such as
7 controller(s). These PMU devices are loosely architected to follow the
8 same model as the PMU for ARM cores. The PMUs share the same top level
11 PMU (perf) driver
14 The xgene-pmu driver registers several perf PMU drivers. Each of the perf
24 Most of the SoC PMU has a specific list of agent ID used for monitoring
26 a specific CPU or an I/O bridge. Each PMU has a set of 2 registers capable of
32 each PMU, please refer to APM X-Gene User Manual.
40 l3c0/ackq-full/ [Kernel PMU event]
[all …]
|
| H A D | hisi-pmu.rst | 2 HiSilicon SoC uncore Performance Monitoring Unit (PMU)
15 HiSilicon SoC uncore PMU driver
19 interrupt, and the PMU driver shall register perf PMU drivers like L3C,
27 Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU
39 ID used to count the uncore PMU event.
44 hisi_sccl3_l3c0/rd_hit_cpipe/ [kernel PMU event]
46 hisi_sccl3_l3c0/wr_hit_cpipe/ [kernel PMU event]
48 hisi_sccl1_l3c0/rd_hit_cpipe/ [kernel PMU event]
50 hisi_sccl1_l3c0/wr_hit_cpipe/ [kernel PMU event]
108 the total counter values in the PMU counters.
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/doc/board/xilinx/ |
| H A D | zynqmp.rst | 46 PMU firmware
48 The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
50 of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
52 tool as the part of make. If you want to create boot.bin with PMU Firmware
53 include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
57 If you see below message you need to load PMU Firmware::
61 The second external blob is PMU Configuration object which is object which is
62 passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
69 PMU configuration object
|