/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
H A D | psi.c | 94 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 296 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 329 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
H A D | psi.c | 94 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 296 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 329 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
H A D | psi.c | 94 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 296 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 329 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
H A D | psi.c | 94 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 296 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 329 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
H A D | psi.c | 94 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 296 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 329 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/ |
H A D | psi.h | 64 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/ |
H A D | psi.h | 46 #define PSIHB_CR_FSP_IRQ PPC_BIT(17) /* FSP interrupt */ macro
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/dports/emulators/qemu42/qemu-4.2.1/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu/qemu-6.2.0/hw/ppc/ |
H A D | pnv_psi.c | 64 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull in pnv_pnor_read() 209 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 249 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) {
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/dports/emulators/qemu5/qemu-5.2.0/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu60/qemu-6.0.0/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/ppc/ |
H A D | pnv_psi.c | 61 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 202 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 243 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/ppc/ |
H A D | pnv_psi.c | 64 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 209 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 249 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/ppc/ |
H A D | pnv_psi.c | 65 #define PSIHB_CR_FSP_IRQ 0x0000400000000000ull macro 210 [PSIHB_IRQ_FSP] = PSIHB_CR_FSP_IRQ, 250 !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { in pnv_psi_power8_irq_set()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
H A D | psi.c | 93 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 295 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 328 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
H A D | psi.c | 81 reg &= ~PSIHB_CR_FSP_IRQ; /* Clear interrupt state too */ in psi_disable_link() 286 return !!(in_be64(psi->regs + PSIHB_CR) & PSIHB_CR_FSP_IRQ); in psi_poll_fsp_interrupt() 319 if (val & PSIHB_CR_FSP_IRQ) { in psihb_interrupt()
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