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Searched refs:R_PPC64_TOC16_LO_DS (Results 1 – 25 of 519) sorted by relevance

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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]]
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dmcm-obj.ll27 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
33 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x0
38 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
56 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
60 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]]
78 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
82 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]]
99 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]]
117 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
134 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS .toc 0x8
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/tools/lld/test/ELF/
H A Dppc64-toc-relax.s26 # RELOCS-LE-NEXT: 0x4 R_PPC64_TOC16_LO_DS .toc 0x0
28 # RELOCS-LE-NEXT: 0x10 R_PPC64_TOC16_LO_DS .toc 0x8
30 # RELOCS-LE-NEXT: 0x1C R_PPC64_TOC16_LO_DS .toc 0x10
32 # RELOCS-LE-NEXT: 0x28 R_PPC64_TOC16_LO_DS .toc 0x18
37 # RELOCS-BE-NEXT: 0x6 R_PPC64_TOC16_LO_DS .toc 0x0
39 # RELOCS-BE-NEXT: 0x12 R_PPC64_TOC16_LO_DS .toc 0x8
41 # RELOCS-BE-NEXT: 0x1E R_PPC64_TOC16_LO_DS .toc 0x10
43 # RELOCS-BE-NEXT: 0x2A R_PPC64_TOC16_LO_DS .toc 0x18
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/lld/test/ELF/
H A Dppc64-toc-relax.s28 # RELOCS-LE-NEXT: 0x4 R_PPC64_TOC16_LO_DS .toc 0x0
30 # RELOCS-LE-NEXT: 0x10 R_PPC64_TOC16_LO_DS .toc 0x8
32 # RELOCS-LE-NEXT: 0x1C R_PPC64_TOC16_LO_DS .toc 0x10
34 # RELOCS-LE-NEXT: 0x28 R_PPC64_TOC16_LO_DS .toc 0x18
39 # RELOCS-BE-NEXT: 0x6 R_PPC64_TOC16_LO_DS .toc 0x0
41 # RELOCS-BE-NEXT: 0x12 R_PPC64_TOC16_LO_DS .toc 0x8
43 # RELOCS-BE-NEXT: 0x1E R_PPC64_TOC16_LO_DS .toc 0x10
45 # RELOCS-BE-NEXT: 0x2A R_PPC64_TOC16_LO_DS .toc 0x18
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/lld/test/ELF/
H A Dppc64-toc-relax.s28 # RELOCS-LE-NEXT: 0x4 R_PPC64_TOC16_LO_DS .toc 0x0
30 # RELOCS-LE-NEXT: 0x10 R_PPC64_TOC16_LO_DS .toc 0x8
32 # RELOCS-LE-NEXT: 0x1C R_PPC64_TOC16_LO_DS .toc 0x10
34 # RELOCS-LE-NEXT: 0x28 R_PPC64_TOC16_LO_DS .toc 0x18
39 # RELOCS-BE-NEXT: 0x6 R_PPC64_TOC16_LO_DS .toc 0x0
41 # RELOCS-BE-NEXT: 0x12 R_PPC64_TOC16_LO_DS .toc 0x8
43 # RELOCS-BE-NEXT: 0x1E R_PPC64_TOC16_LO_DS .toc 0x10
45 # RELOCS-BE-NEXT: 0x2A R_PPC64_TOC16_LO_DS .toc 0x18
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/lld/test/ELF/
H A Dppc64-toc-relax.s28 # RELOCS-LE-NEXT: 0x4 R_PPC64_TOC16_LO_DS .toc 0x0
30 # RELOCS-LE-NEXT: 0x10 R_PPC64_TOC16_LO_DS .toc 0x8
32 # RELOCS-LE-NEXT: 0x1C R_PPC64_TOC16_LO_DS .toc 0x10
34 # RELOCS-LE-NEXT: 0x28 R_PPC64_TOC16_LO_DS .toc 0x18
39 # RELOCS-BE-NEXT: 0x6 R_PPC64_TOC16_LO_DS .toc 0x0
41 # RELOCS-BE-NEXT: 0x12 R_PPC64_TOC16_LO_DS .toc 0x8
43 # RELOCS-BE-NEXT: 0x1E R_PPC64_TOC16_LO_DS .toc 0x10
45 # RELOCS-BE-NEXT: 0x2A R_PPC64_TOC16_LO_DS .toc 0x18
/dports/devel/llvm11/llvm-11.0.1.src/tools/lld/test/ELF/
H A Dppc64-toc-relax.s28 # RELOCS-LE-NEXT: 0x4 R_PPC64_TOC16_LO_DS .toc 0x0
30 # RELOCS-LE-NEXT: 0x10 R_PPC64_TOC16_LO_DS .toc 0x8
32 # RELOCS-LE-NEXT: 0x1C R_PPC64_TOC16_LO_DS .toc 0x10
34 # RELOCS-LE-NEXT: 0x28 R_PPC64_TOC16_LO_DS .toc 0x18
39 # RELOCS-BE-NEXT: 0x6 R_PPC64_TOC16_LO_DS .toc 0x0
41 # RELOCS-BE-NEXT: 0x12 R_PPC64_TOC16_LO_DS .toc 0x8
43 # RELOCS-BE-NEXT: 0x1E R_PPC64_TOC16_LO_DS .toc 0x10
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