Searched refs:SCLK_RATE (Results 1 – 10 of 10) sorted by relevance
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t132/ |
| H A D | plat_psci_handlers.c | 33 #define SCLK_RATE 0x30 macro
191 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t132/ |
| H A D | plat_psci_handlers.c | 33 #define SCLK_RATE 0x30 macro
191 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t132/ |
| H A D | plat_psci_handlers.c | 33 #define SCLK_RATE 0x30 macro
191 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t132/ |
| H A D | plat_psci_handlers.c | 33 #define SCLK_RATE 0x30 macro
191 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t132/ |
| H A D | plat_psci_handlers.c | 33 #define SCLK_RATE 0x30 macro
191 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 36 #define SCLK_RATE 0x30 macro
592 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 36 #define SCLK_RATE 0x30 macro
592 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 36 #define SCLK_RATE 0x30 macro
592 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 36 #define SCLK_RATE 0x30 macro
592 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 36 #define SCLK_RATE 0x30 macro
592 mmio_write_32((uintptr_t)TEGRA_CAR_RESET_BASE + SCLK_RATE, 0); in tegra_soc_prepare_system_reset()
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