| /dports/devel/avr-gdb/gdb-7.3.1/sim/d10v/ |
| H A D | d10v_sim.h | 412 #define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000))
415 #define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000))
418 #define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x8000000000…
421 #define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x8000…
424 #define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x80…
426 #define MAX32 SIGNED64(0x7fffffff)
427 #define MIN32 SIGNED64(0xff80000000)
428 #define MASK32 SIGNED64(0xffffffff)
429 #define MASK40 SIGNED64(0xffffffffff)
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| H A D | simops.c | 2239 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_5201()
2244 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_5201()
2272 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_4201()
2277 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_4201()
|
| H A D | ChangeLog | 701 SIGNED64 macro.
746 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
754 SIGNED64 macro.
|
| /dports/devel/gdb761/gdb-7.6.1/sim/d10v/ |
| H A D | d10v_sim.h | 412 #define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000))
415 #define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000))
418 #define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x8000000000…
421 #define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x8000…
424 #define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x80…
426 #define MAX32 SIGNED64(0x7fffffff)
427 #define MIN32 SIGNED64(0xff80000000)
428 #define MASK32 SIGNED64(0xffffffff)
429 #define MASK40 SIGNED64(0xffffffffff)
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| H A D | simops.c | 2239 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_5201()
2244 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_5201()
2272 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_4201()
2277 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_4201()
|
| H A D | ChangeLog | 736 SIGNED64 macro.
781 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
789 SIGNED64 macro.
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/d10v/ |
| H A D | d10v_sim.h | 412 #define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000))
415 #define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000))
418 #define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x8000000000…
421 #define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x8000…
424 #define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x80…
426 #define MAX32 SIGNED64(0x7fffffff)
427 #define MIN32 SIGNED64(0xff80000000)
428 #define MASK32 SIGNED64(0xffffffff)
429 #define MASK40 SIGNED64(0xffffffffff)
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| H A D | simops.c | 2239 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_5201()
2244 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_5201()
2272 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_4201()
2277 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_4201()
|
| H A D | ChangeLog | 621 SIGNED64 macro.
666 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
674 SIGNED64 macro.
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/d10v/ |
| H A D | d10v_sim.h | 412 #define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000))
415 #define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000))
418 #define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x8000000000…
421 #define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x8000…
424 #define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x80…
426 #define MAX32 SIGNED64(0x7fffffff)
427 #define MIN32 SIGNED64(0xff80000000)
428 #define MASK32 SIGNED64(0xffffffff)
429 #define MASK40 SIGNED64(0xffffffffff)
|
| H A D | simops.c | 2239 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_5201()
2244 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_5201()
2272 if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) in OP_4201()
2277 else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) in OP_4201()
|
| H A D | ChangeLog | 621 SIGNED64 macro.
666 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
674 SIGNED64 macro.
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/common/ |
| H A D | sim-types.h | 55 #define SIGNED64(X) ((signed64) X##LL) macro
82 #define SIGNED64(X) (X##i64) macro
109 #define SIGNED64(X) (X##LL) macro
|
| H A D | sim-fpu.c | 514 if (tmp & ((SIGNED64 (1) << shift) - 1)) in fpu2i()
|
| /dports/devel/gdb761/gdb-7.6.1/sim/common/ |
| H A D | sim-types.h | 54 #define SIGNED64(X) ((signed64) X##LL) macro
81 #define SIGNED64(X) (X##i64) macro
108 #define SIGNED64(X) (X##LL) macro
|
| H A D | sim-fpu.c | 513 if (tmp & ((SIGNED64 (1) << shift) - 1)) in fpu2i()
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/common/ |
| H A D | sim-types.h | 56 #define SIGNED64(X) ((signed64) X##LL) macro
83 #define SIGNED64(X) (X##i64) macro
110 #define SIGNED64(X) (X##LL) macro
|
| H A D | sim-fpu.c | 507 if (tmp & ((SIGNED64 (1) << shift) - 1)) in fpu2i()
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/common/ |
| H A D | sim-types.h | 56 #define SIGNED64(X) ((signed64) X##LL) macro
83 #define SIGNED64(X) (X##i64) macro
110 #define SIGNED64(X) (X##LL) macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
| H A D | idecode_expression.h | 59 #define SIGNED64(val) ((signed64)(signed32)(val)) macro
143 + SIGNED64(EXTRACTED(val, 0, 31)) \
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/ppc/ |
| H A D | idecode_expression.h | 59 #define SIGNED64(val) ((signed64)(signed32)(val)) macro
143 + SIGNED64(EXTRACTED(val, 0, 31)) \
|
| /dports/devel/gdb761/gdb-7.6.1/sim/ppc/ |
| H A D | idecode_expression.h | 58 #define SIGNED64(val) ((signed64)(signed32)(val)) macro
142 + SIGNED64(EXTRACTED(val, 0, 31)) \
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
| H A D | idecode_expression.h | 59 #define SIGNED64(val) ((signed64)(signed32)(val)) macro
143 + SIGNED64(EXTRACTED(val, 0, 31)) \
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
| H A D | mips.igen | 1263 lo = SIGNED64 (0x8000000000000000);
1266 else if (d == -1 && n == SIGNED64 (0x8000000000000000))
1268 lo = SIGNED64 (0x8000000000000000);
1308 lo = SIGNED64 (0x8000000000000000);
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
| H A D | mips.igen | 1263 lo = SIGNED64 (0x8000000000000000);
1266 else if (d == -1 && n == SIGNED64 (0x8000000000000000))
1268 lo = SIGNED64 (0x8000000000000000);
1308 lo = SIGNED64 (0x8000000000000000);
|