Searched refs:S_ASR (Results 1 – 6 of 6) sorted by relevance
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
H A D | op_helper_cheri.c | 55 S_ASR = S_Always | ASR_Flag, enumerator 90 [CheriSCR_STCC] = {.r = true, .w = true, .access = S_ASR, .name = "STCC"}, 91 [CheriSCR_STDC] = {.r = true, .w = true, .access = S_ASR, .name = "STDC"}, 94 .access = S_ASR, 96 [CheriSCR_SEPCC] = {.r = true, .w = true, .access = S_ASR, .name = "SEPCC"},
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/dports/devel/dxa65/dxa-0.1.4/ |
H A D | opcodes.h | 79 S_SREO, S_ARR, S_ASR, S_ANC, S_NOOP, S_STP, S_TXA, S_LDAX enumerator 155 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm}, 237 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm}, 319 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm},
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/dports/games/libretro-mgba/mgba-6186d45/src/arm/ |
H A D | decoder-arm.c | 122 …DEFINE_ALU_DECODER_EX_ARM(NAME ## S_ASR, NAME, 1, ADDR_MODE_1_ASR, ARM_OPERAND_AFFECTED_1, SKIPPED…
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H A D | isa-arm.c | 323 DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## S_ASR, S_BODY, _shiftASR, BODY) \
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/dports/emulators/mgba/mgba-0.9.2/src/arm/ |
H A D | decoder-arm.c | 122 …DEFINE_ALU_DECODER_EX_ARM(NAME ## S_ASR, NAME, 1, ADDR_MODE_1_ASR, ARM_OPERAND_AFFECTED_1, SKIPPED…
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H A D | isa-arm.c | 310 DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## S_ASR, S_BODY, _shiftASR, BODY) \
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