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/dports/www/otrs/otrs-rel-6_0_29/scripts/test/Layout/
H A DBuildSelection.t205 'Select1' => [
271 'Select1' => [
376 'Select1' => [
443 'Select1' => [
508 'Select1' => [
616 'Select1' => [
720 'Select1' => [
833 'Select1' => [
943 'Select1' => [
1035 'Select1' => [
[all …]
/dports/www/p5-HTML-FillInForm-Lite/HTML-FillInForm-Lite-1.13/example/
H A Ddemo.cgi52 <option value="s1">Select1</option>
57 <option value="s1">Select1</option>
62 <option value="s1">Select1</option>
/dports/japanese/ibus-mozc/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
H A Dsimple_succinct_bit_vector_index.h96 int Select1(int n) const;
/dports/japanese/uim-mozc/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
H A Dsimple_succinct_bit_vector_index.h96 int Select1(int n) const;
/dports/japanese/mozc-tool/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
H A Dsimple_succinct_bit_vector_index.h96 int Select1(int n) const;
/dports/japanese/mozc-server/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
H A Dsimple_succinct_bit_vector_index.h96 int Select1(int n) const;
/dports/japanese/fcitx-mozc/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
/dports/japanese/mozc-el/mozc-2.23.2815.102.01/src/storage/louds/
H A Dsimple_succinct_bit_vector_index_test.cc107 EXPECT_EQ(i + 15, bit_vector.Select1(i)) << i; in TEST_P()
110 EXPECT_EQ(i + 31, bit_vector.Select1(i)) << i; in TEST_P()
149 EXPECT_EQ(i * 2 + 1, bit_vector.Select1(i + 1)) << i; in TEST_P()
188 EXPECT_EQ((i * 2 + 1) + ((i + 1) % 2) , bit_vector.Select1(i + 1)) << i; in TEST_P()
H A Dlouds.h120 : index_.Select1(node_id); in InitNodeFromNodeId()
164 : index_.Select1(node->node_id_); in MoveToParent()
/dports/net/google-cloud-sdk-app-engine-go/platform/google_appengine/goroot-1.9/src/cmd/compile/internal/ssa/gen/
H A DMIPS64.rules21 (Mul64 x y) -> (Select1 (MULVU x y))
22 (Mul32 x y) -> (Select1 (MULVU x y))
23 (Mul16 x y) -> (Select1 (MULVU x y))
24 (Mul8 x y) -> (Select1 (MULVU x y))
33 (Div64 x y) -> (Select1 (DIVV x y))
34 (Div64u x y) -> (Select1 (DIVVU x y))
600 (Select1 (MULVU x (MOVVconst [-1]))) -> (NEGV x)
602 (Select1 (MULVU x (MOVVconst [1]))) -> x
605 (Select1 (MULVU (MOVVconst [-1]) x)) -> (NEGV x)
607 (Select1 (MULVU (MOVVconst [1]) x)) -> x
[all …]
H A DMIPS.rules13 (Select1 (Add32carry <t> x y)) -> (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
24 (Select1 (Sub32carry <t> x y)) -> (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
38 (Div32 x y) -> (Select1 (DIV x y))
39 (Div32u x y) -> (Select1 (DIVU x y))
40 (Div16 x y) -> (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
41 (Div16u x y) -> (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
42 (Div8 x y) -> (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
43 (Div8u x y) -> (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
614 (Select1 (MULTU (MOVWconst [0]) _ )) -> (MOVWconst [0])
616 (Select1 (MULTU (MOVWconst [1]) x )) -> x
[all …]
/dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/compile/internal/ssa/gen/
H A DMIPS64.rules11 (Mul(64|32|16|8) x y) => (Select1 (MULVU x y))
14 (Select0 (Mul64uover x y)) => (Select1 <typ.UInt64> (MULVU x y))
22 (Div64 x y) => (Select1 (DIVV x y))
23 (Div64u x y) => (Select1 (DIVVU x y))
24 (Div32 x y) => (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
28 (Div8 x y) => (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
29 (Div8u x y) => (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
586 (Select1 (MULVU x (MOVVconst [-1]))) => (NEGV x)
587 (Select1 (MULVU _ (MOVVconst [0]))) => (MOVVconst [0])
588 (Select1 (MULVU x (MOVVconst [1]))) => x
[all …]
H A DMIPS.rules9 (Select1 (Add32carry <t> x y)) => (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
16 (Select1 (Sub32carry <t> x y)) => (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
25 (Div32 x y) => (Select1 (DIV x y))
26 (Div32u x y) => (Select1 (DIVU x y))
27 (Div16 x y) => (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
28 (Div16u x y) => (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
29 (Div8 x y) => (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
30 (Div8u x y) => (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
586 (Select1 (MULTU (MOVWconst [0]) _ )) => (MOVWconst [0])
588 (Select1 (MULTU (MOVWconst [1]) x )) => x
[all …]
/dports/lang/go-devel/go-dragonfly-amd64-bootstrap/src/cmd/compile/internal/ssa/gen/
H A DMIPS64.rules11 (Mul(64|32|16|8) x y) -> (Select1 (MULVU x y))
20 (Div64 x y) -> (Select1 (DIVV x y))
21 (Div64u x y) -> (Select1 (DIVVU x y))
26 (Div8 x y) -> (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
606 (Select1 (MULVU x (MOVVconst [-1]))) -> (NEGV x)
607 (Select1 (MULVU _ (MOVVconst [0]))) -> (MOVVconst [0])
608 (Select1 (MULVU x (MOVVconst [1]))) -> x
611 (Select1 (MULVU (MOVVconst [-1]) x)) -> (NEGV x)
612 (Select1 (MULVU (MOVVconst [0]) _)) -> (MOVVconst [0])
613 (Select1 (MULVU (MOVVconst [1]) x)) -> x
[all …]
H A DMIPS.rules9 (Select1 (Add32carry <t> x y)) -> (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
16 (Select1 (Sub32carry <t> x y)) -> (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
25 (Div32 x y) -> (Select1 (DIV x y))
26 (Div32u x y) -> (Select1 (DIVU x y))
27 (Div16 x y) -> (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
28 (Div16u x y) -> (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
29 (Div8 x y) -> (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
30 (Div8u x y) -> (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
596 (Select1 (MULTU (MOVWconst [0]) _ )) -> (MOVWconst [0])
598 (Select1 (MULTU (MOVWconst [1]) x )) -> x
[all …]
/dports/lang/mono-basic/mono-basic-4.7/vbnc/vbnc/tests/CompileTime2/
H A DSelect1.vb5 Namespace Select1

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