/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/ |
H A D | stm32h7xx_ll_tim.c | 560 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init() 584 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init() 647 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init() 685 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init() 826 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); in OC1Config() 847 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config() 1249 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in IC1Config() 1259 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); in IC1Config()
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H A D | stm32h7xx_hal_tim.c | 6126 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_OC1_SetConfig() 6565 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig() 6654 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_SetConfig() 6701 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_ConfigInputStage() 6986 tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ in TIM_CCxChannelCmd()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pwm/ |
H A D | pwm-stm32.c | 71 #define TIM_CCER_CC12E (TIM_CCER_CC1E | TIM_CCER_CC2E) 410 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_enable() 430 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_disable() 593 if (ccer & TIM_CCER_CC1E) in stm32_pwm_detect_channels() 672 mask = TIM_CCER_CC1E << (i * 4); in stm32_pwm_suspend()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/pwm/ |
H A D | pwm-stm32.c | 71 #define TIM_CCER_CC12E (TIM_CCER_CC1E | TIM_CCER_CC2E) 410 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_enable() 430 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_disable() 593 if (ccer & TIM_CCER_CC1E) in stm32_pwm_detect_channels() 672 mask = TIM_CCER_CC1E << (i * 4); in stm32_pwm_suspend()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pwm/ |
H A D | pwm-stm32.c | 71 #define TIM_CCER_CC12E (TIM_CCER_CC1E | TIM_CCER_CC2E) 410 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_enable() 430 mask = TIM_CCER_CC1E << (ch * 4); in stm32_pwm_disable() 593 if (ccer & TIM_CCER_CC1E) in stm32_pwm_detect_channels() 672 mask = TIM_CCER_CC1E << (i * 4); in stm32_pwm_suspend()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/ |
H A D | stm32g4xx_ll_tim.c | 542 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init() 566 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init() 629 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init() 667 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init() 814 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); in OC1Config() 835 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config() 1246 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in IC1Config() 1256 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); in IC1Config()
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H A D | stm32g4xx_hal_tim.c | 6846 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_OC1_SetConfig() 7302 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig() 7398 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_SetConfig() 7445 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_ConfigInputStage() 7736 tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ in TIM_CCxChannelCmd()
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/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/mfd/ |
H A D | stm32-timers.h | 62 #define TIM_CCER_CC1E BIT(0) /* Capt/Comp 1 out Ena */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/mfd/ |
H A D | stm32-timers.h | 62 #define TIM_CCER_CC1E BIT(0) /* Capt/Comp 1 out Ena */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/mfd/ |
H A D | stm32-timers.h | 62 #define TIM_CCER_CC1E BIT(0) /* Capt/Comp 1 out Ena */ macro
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/dports/lang/micropython/micropython-1.17/ports/stm32/boards/LEGO_HUB_NO6/ |
H A D | hub_display.c | 69 reg = TIM_CCER_CC1E; in hub_display_tim_init()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
H A D | stm32f4xx_tim.c | 684 TIMx->CCER &= (uint16_t)~TIM_CCER_CC1E; in TIM_OC1Init() 3210 TIMx->CCER &= (uint16_t)~TIM_CCER_CC1E; in TI1_Config() 3220 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
H A D | stm32f4xx_tim.c | 684 TIMx->CCER &= (uint16_t)~TIM_CCER_CC1E; in TIM_OC1Init() 3210 TIMx->CCER &= (uint16_t)~TIM_CCER_CC1E; in TI1_Config() 3220 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/ |
H A D | stm32f37x_tim.c | 776 TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); in TIM_OC1Init() 3021 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); in TI1_Config() 3030 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/ |
H A D | stm32f37x_tim.c | 776 TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); in TIM_OC1Init() 3021 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); in TI1_Config() 3030 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/ |
H A D | stm32f0xx_tim.c | 785 TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); in TIM_OC1Init() 3208 TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); in TI1_Config() 3217 tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F30x_StdPeriph_Driver/src/ |
H A D | stm32f30x_tim.c | 692 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in TIM_OC1Init() 3851 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in TI1_Config() 3861 tmpccer |= (uint32_t)(TIM_ICPolarity | (uint32_t)TIM_CCER_CC1E); in TI1_Config()
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/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_ll_tim.h | 403 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 … 416 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
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H A D | stm32l1xx_hal_tim.h | 768 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4…
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/ |
H A D | stm32h7xx_hal_tim.h | 540 #define TIM_OUTPUTSTATE_ENABLE TIM_CCER_CC1E /*!< Capture/Compar… 1628 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC…
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H A D | stm32h7xx_ll_tim.h | 651 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 … 669 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
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/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_ll_tim.h | 403 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 … 416 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
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/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_ll_tim.h | 403 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 … 416 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
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/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/ |
H A D | stm32l1xx_ll_tim.h | 403 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 … 416 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/ |
H A D | stm32g4xx_hal_tim.h | 603 #define TIM_OUTPUTSTATE_ENABLE TIM_CCER_CC1E /*!< Capture/Compar… 1833 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC…
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