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Searched refs:TIM_CR2_OIS1N (Results 1 – 25 of 30) sorted by relevance

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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_ll_tim.c864 MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U); in OC1Config()
H A Dstm32h7xx_hal_tim.c6168 tmpcr2 &= ~TIM_CR2_OIS1N; in TIM_OC1_SetConfig()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/
H A Dstm32g4xx_ll_tim.c852 MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U); in OC1Config()
H A Dstm32g4xx_hal_tim.c6888 tmpcr2 &= ~TIM_CR2_OIS1N; in TIM_OC1_SetConfig()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_hal_tim.h603 #define TIM_OCNIDLESTATE_SET TIM_CR2_OIS1N /*!< Complementary …
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c726 tmpcr2 &= (uint16_t)~TIM_CR2_OIS1N; in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c726 tmpcr2 &= (uint16_t)~TIM_CR2_OIS1N; in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/
H A Dstm32f37x_tim.c819 tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/
H A Dstm32f37x_tim.c819 tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/
H A Dstm32f0xx_tim.c828 tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/
H A Dstm32g4xx_hal_tim.h666 #define TIM_OCNIDLESTATE_SET TIM_CR2_OIS1N /*!< Complementary …
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F30x_StdPeriph_Driver/src/
H A Dstm32f30x_tim.c734 tmpcr2 &= (uint32_t)~TIM_CR2_OIS1N; in TIM_OC1Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h4939 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dstm32f0xx.h5017 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h4939 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3754 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3754 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dstm32f30x.h8424 #define TIM_CR2_OIS1N ((uint32_t)0x00000200) /*!<Output Idle stat… macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h10449 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h10449 #define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!<Output Idle state 1 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dstm32g431xx.h10013 #define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle stat… macro
H A Dstm32gbk1cb.h9985 #define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle stat… macro
H A Dstm32g441xx.h10244 #define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle stat… macro
H A Dstm32g471xx.h10521 #define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle stat… macro
H A Dstm32g473xx.h11295 #define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle stat… macro

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