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Searched refs:TIM_CR2_OIS3 (Results 1 – 25 of 26) sorted by relevance

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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_ll_tim.c1019 MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U); in OC3Config()
H A Dstm32h7xx_hal_tim.c6317 tmpcr2 &= ~TIM_CR2_OIS3; in TIM_OC3_SetConfig()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/
H A Dstm32g4xx_ll_tim.c1007 MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U); in OC3Config()
H A Dstm32g4xx_hal_tim.c7037 tmpcr2 &= ~TIM_CR2_OIS3; in TIM_OC3_SetConfig()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c887 tmpcr2 &= (uint16_t)~TIM_CR2_OIS3; in TIM_OC3Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c887 tmpcr2 &= (uint16_t)~TIM_CR2_OIS3; in TIM_OC3Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/
H A Dstm32f0xx_tim.c1002 tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3)); in TIM_OC3Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F30x_StdPeriph_Driver/src/
H A Dstm32f30x_tim.c894 tmpcr2 &= (uint32_t)~TIM_CR2_OIS3; in TIM_OC3Init()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h4942 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dstm32f0xx.h5020 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h4942 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3757 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3757 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dstm32f30x.h8427 #define TIM_CR2_OIS3 ((uint32_t)0x00001000) /*!<Output Idle stat… macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h10452 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h10452 #define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!<Output Idle state 3 … macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dstm32g431xx.h10022 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32gbk1cb.h9994 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g441xx.h10253 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g471xx.h10530 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g473xx.h11304 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g483xx.h11535 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g474xx.h14666 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
H A Dstm32g484xx.h14897 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_h7xx/
H A Dstm32h753xx.h19437 #define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle stat… macro

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