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Searched refs:UVD_CGC_CTRL__UDEC_MODE_MASK (Results 1 – 25 of 54) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h450 #define UVD_CGC_CTRL__UDEC_MODE_MASK macro
H A Duvd_4_2_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_0_sh_mask.h68 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_3_1_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_5_0_sh_mask.h261 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_6_0_sh_mask.h263 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h450 #define UVD_CGC_CTRL__UDEC_MODE_MASK macro
H A Duvd_3_1_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_0_sh_mask.h68 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_4_2_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_5_0_sh_mask.h261 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_6_0_sh_mask.h263 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h450 #define UVD_CGC_CTRL__UDEC_MODE_MASK macro
H A Duvd_3_1_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_0_sh_mask.h68 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_4_2_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_5_0_sh_mask.h261 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_6_0_sh_mask.h263 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c497 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_disable_clock_gating()
597 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_enable_clock_gating()
655 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c528 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_disable_clock_gating()
604 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
665 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v2_5.c595 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_disable_clock_gating()
672 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
734 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_enable_clock_gating()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c497 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_disable_clock_gating()
597 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_enable_clock_gating()
655 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c528 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_disable_clock_gating()
604 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
665 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_enable_clock_gating()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c497 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_disable_clock_gating()
597 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_enable_clock_gating()
655 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c528 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_disable_clock_gating()
604 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
665 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_enable_clock_gating()

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