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Searched refs:UVD_MPC_SET_MUXB0__VARB_3__SHIFT (Results 1 – 25 of 45) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h619 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
H A Duvd_4_2_sh_mask.h504 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_4_0_sh_mask.h519 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x00000012 macro
H A Duvd_3_1_sh_mask.h500 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_5_0_sh_mask.h536 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_6_0_sh_mask.h538 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h619 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
H A Duvd_3_1_sh_mask.h500 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_4_0_sh_mask.h519 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x00000012 macro
H A Duvd_4_2_sh_mask.h504 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_5_0_sh_mask.h536 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_6_0_sh_mask.h538 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h619 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
H A Duvd_3_1_sh_mask.h500 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_4_0_sh_mask.h519 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x00000012 macro
H A Duvd_4_2_sh_mask.h504 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_5_0_sh_mask.h536 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
H A Duvd_6_0_sh_mask.h538 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT 0x12 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1126 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1126 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1126 #define UVD_MPC_SET_MUXB0__VARB_3__SHIFT macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c824 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_spg_mode()
1007 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_dpg_mode()
H A Dvcn_v2_0.c844 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v2_0_start_dpg_mode()
979 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v2_0_start()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c824 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_spg_mode()
1007 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_dpg_mode()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c824 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_spg_mode()
1007 (0x3 << UVD_MPC_SET_MUXB0__VARB_3__SHIFT) | in vcn_v1_0_start_dpg_mode()

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