| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 42 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| H A D | uvd_5_0_sh_mask.h | 939 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| H A D | uvd_6_0_sh_mask.h | 927 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 42 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| H A D | uvd_5_0_sh_mask.h | 939 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| H A D | uvd_6_0_sh_mask.h | 927 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 42 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| H A D | uvd_5_0_sh_mask.h | 939 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| H A D | uvd_6_0_sh_mask.h | 927 #define UVD_POWER_STATUS__UVD_PG_EN_MASK 0x100 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 83 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| H A D | vcn_2_5_sh_mask.h | 1523 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 83 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 83 #define UVD_POWER_STATUS__UVD_PG_EN_MASK … macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v1_0.c | 721 data |= UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON | UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_1_0_disable_static_power_gating()
962 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v1_0_start_dpg_mode()
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| H A D | vcn_v2_0.c | 739 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_disable_static_power_gating()
797 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_start_dpg_mode()
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| H A D | vcn_v3_0.c | 644 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_disable_static_power_gating()
958 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 1465 WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK); in uvd_v6_0_set_powergating_state()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v1_0.c | 721 data |= UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON | UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_1_0_disable_static_power_gating()
962 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v1_0_start_dpg_mode()
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| H A D | vcn_v2_0.c | 739 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_disable_static_power_gating()
797 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_start_dpg_mode()
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| H A D | vcn_v3_0.c | 644 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_disable_static_power_gating()
958 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 1465 WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK); in uvd_v6_0_set_powergating_state()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v1_0.c | 721 data |= UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON | UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_1_0_disable_static_power_gating()
962 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v1_0_start_dpg_mode()
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| H A D | vcn_v2_0.c | 739 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_disable_static_power_gating()
797 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v2_0_start_dpg_mode()
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| H A D | vcn_v3_0.c | 644 UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_disable_static_power_gating()
958 tmp |= UVD_POWER_STATUS__UVD_PG_EN_MASK; in vcn_v3_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 1465 WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK); in uvd_v6_0_set_powergating_state()
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