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Searched refs:XhcWriteOpReg (Results 1 – 25 of 44) sorted by relevance

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/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
H A DXhciReg.h279 XhcWriteOpReg (
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
H A DXhciReg.h279 XhcWriteOpReg (
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
H A DXhciReg.h279 XhcWriteOpReg (
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c530 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
533 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
555 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
644 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
649 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
651 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
673 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
681 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
689 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
697 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c137 XhcWriteOpReg ( in XhcWriteOpReg() function
468 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
491 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c530 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
533 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
555 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
644 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
649 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
651 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
673 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
681 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
689 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
697 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c137 XhcWriteOpReg ( in XhcWriteOpReg() function
468 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
491 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg ( in XhcWriteOpReg() function
396 XhcWriteOpReg (Xhc, Offset, Data); in XhcSetOpRegBit()
419 XhcWriteOpReg (Xhc, Offset, Data); in XhcClearOpRegBit()
/dports/sysutils/edk2/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhci.c526 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
529 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
551 XhcWriteOpReg (Xhc, Offset, State); in XhcSetRootHubPortFeature()
640 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
645 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
647 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
669 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
677 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
685 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
693 XhcWriteOpReg (Xhc, Offset, State); in XhcClearRootHubPortFeature()
H A DXhciReg.c131 XhcWriteOpReg (
396 XhcWriteOpReg (Xhc, Offset, Data);
419 XhcWriteOpReg (Xhc, Offset, Data);

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