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Searched refs:alu_result (Results 1 – 8 of 8) sorted by relevance

/dports/cad/yosys/yosys-yosys-0.12/tests/simple/
H A Dimplicit_ports.v7 module named_ports(input [2:0] a, b, output [2:0] alu_result, output cout); port
14 .result(alu_result)
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/
H A Didecode_expression.h77 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
97 (long)alu_result, (long)alu_result, (long)XER)); \
99 CR0_COMPARE(alu_result, 0, Rc); \
101 TARG = alu_result; \
/dports/devel/avr-gdb/gdb-7.3.1/sim/ppc/
H A Didecode_expression.h77 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
97 (long)alu_result, (long)alu_result, (long)XER)); \
99 CR0_COMPARE(alu_result, 0, Rc); \
101 TARG = alu_result; \
/dports/devel/gdb761/gdb-7.6.1/sim/ppc/
H A Didecode_expression.h76 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
96 (long)alu_result, (long)alu_result, (long)XER)); \
98 CR0_COMPARE(alu_result, 0, Rc); \
100 TARG = alu_result; \
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/
H A Didecode_expression.h77 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
97 (long)alu_result, (long)alu_result, (long)XER)); \
99 CR0_COMPARE(alu_result, 0, Rc); \
101 TARG = alu_result; \
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ashenden/compliant/aliases/
H A Dcontroller_system.vhd52 alu_result : std_logic_vector(0 to alu_data_width - 1); signal
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-93/ashenden/compliant/
H A Dch_09_fg_09_01.vhd59 alu_result : std_logic_vector(0 to alu_data_width - 1); signal
/dports/cad/ghdl/ghdl-1.0.0/testsuite/gna/issue30/
H A Dtb-alu.vhdl328 a => alu_result,
351 a => alu_result,
363 a => alu_result,
375 a => alu_result,
387 a => alu_result,
399 a => alu_result,
411 a => alu_result,
423 a => alu_result,
435 a => alu_result,
459 a => alu_result,
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