/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/hisilicon/poplar/ |
H A D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load() 57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load() 59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load() 61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load() 64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/hisilicon/poplar/ |
H A D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load() 57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load() 59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load() 61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load() 64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/hisilicon/poplar/ |
H A D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load() 57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load() 59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load() 61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load() 64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/hisilicon/poplar/ |
H A D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load() 57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load() 59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load() 61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load() 64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/hisilicon/poplar/ |
H A D | bl1_plat_setup.c | 30 static meminfo_t bl2_tzram_layout; variable 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load() 57 bl2_tzram_layout.total_size = BL32_LIMIT - BL2_BASE; in bl1_plat_handle_post_image_load() 59 flush_dcache_range((uintptr_t)&bl2_tzram_layout, sizeof(meminfo_t)); in bl1_plat_handle_post_image_load() 61 ep_info->args.arg1 = (uintptr_t)&bl2_tzram_layout; in bl1_plat_handle_post_image_load() 64 (void *)&bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/arm/board/fvp/ |
H A D | fvp_bl1_setup.c | 87 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load() local 116 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load() 118 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load() 120 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; in bl1_plat_handle_post_image_load() 123 (void *)bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/arm/board/fvp/ |
H A D | fvp_bl1_setup.c | 87 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load() local 116 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load() 118 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load() 120 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; in bl1_plat_handle_post_image_load() 123 (void *)bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/arm/board/fvp/ |
H A D | fvp_bl1_setup.c | 87 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load() local 116 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load() 118 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load() 120 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; in bl1_plat_handle_post_image_load() 123 (void *)bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/arm/board/fvp/ |
H A D | fvp_bl1_setup.c | 87 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load() local 116 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load() 118 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load() 120 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; in bl1_plat_handle_post_image_load() 123 (void *)bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/arm/board/fvp/ |
H A D | fvp_bl1_setup.c | 87 meminfo_t *bl2_tzram_layout; in bl1_plat_handle_post_image_load() local 116 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; in bl1_plat_handle_post_image_load() 118 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); in bl1_plat_handle_post_image_load() 120 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; in bl1_plat_handle_post_image_load() 123 (void *)bl2_tzram_layout); in bl1_plat_handle_post_image_load()
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/marvell/armada/common/ |
H A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout() 52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup() 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup() 80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/marvell/armada/common/ |
H A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout() 52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup() 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup() 80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/marvell/armada/common/ |
H A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout() 52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup() 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup() 80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/marvell/armada/common/ |
H A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout() 52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup() 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup() 80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/marvell/armada/common/ |
H A D | marvell_bl2_setup.c | 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 37 return &bl2_tzram_layout; in bl2_plat_sec_mem_layout() 52 bl2_tzram_layout = *mem_layout; in marvell_bl2_early_platform_setup() 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, in marvell_bl2_plat_arch_setup() 80 bl2_tzram_layout.total_size, in marvell_bl2_plat_arch_setup()
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/layerscape/common/ |
H A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 33 bl2_tzram_layout = *mem_layout; in ls_bl2_early_platform_setup() 45 ls_setup_page_tables(bl2_tzram_layout.total_base, in ls_bl2_plat_arch_setup() 46 bl2_tzram_layout.total_size, in ls_bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/layerscape/common/ |
H A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 33 bl2_tzram_layout = *mem_layout; in ls_bl2_early_platform_setup() 45 ls_setup_page_tables(bl2_tzram_layout.total_base, in ls_bl2_plat_arch_setup() 46 bl2_tzram_layout.total_size, in ls_bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/layerscape/common/ |
H A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 33 bl2_tzram_layout = *mem_layout; in ls_bl2_early_platform_setup() 45 ls_setup_page_tables(bl2_tzram_layout.total_base, in ls_bl2_plat_arch_setup() 46 bl2_tzram_layout.total_size, in ls_bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/layerscape/common/ |
H A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 33 bl2_tzram_layout = *mem_layout; in ls_bl2_early_platform_setup() 45 ls_setup_page_tables(bl2_tzram_layout.total_base, in ls_bl2_plat_arch_setup() 46 bl2_tzram_layout.total_size, in ls_bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/layerscape/common/ |
H A D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 33 bl2_tzram_layout = *mem_layout; in ls_bl2_early_platform_setup() 45 ls_setup_page_tables(bl2_tzram_layout.total_base, in ls_bl2_plat_arch_setup() 46 bl2_tzram_layout.total_size, in ls_bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rpi/rpi3/ |
H A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 63 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2() 84 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup() 85 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rpi/rpi3/ |
H A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 63 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2() 84 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup() 85 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rpi/rpi3/ |
H A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 63 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2() 84 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup() 85 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rpi/rpi3/ |
H A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 63 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2() 84 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup() 85 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rpi/rpi3/ |
H A D | rpi3_bl2_setup.c | 25 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 63 bl2_tzram_layout = *mem_layout; in bl2_early_platform_setup2() 84 rpi3_setup_page_tables(bl2_tzram_layout.total_base, in bl2_plat_arch_setup() 85 bl2_tzram_layout.total_size, in bl2_plat_arch_setup()
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