Searched refs:ch1tx (Results 1 – 4 of 4) sorted by relevance
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/toplevel/usrp_std/ |
H A D | usrp_std.v | 107 wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; //,ch4tx,ch5tx,ch6tx,ch7tx; net 128 assign bb_tx_q0 = ch1tx; 138 .tx_i_0(ch0tx),.tx_q_0(ch1tx), 205 loopback_q_0 <= #1 ch1tx;
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/toplevel/usrp_inband_usb/ |
H A D | usrp_inband_usb.v | 100 wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; //,ch4tx,ch5tx,ch6tx,ch7tx; net 127 assign bb_tx_q0 = ch1tx; 138 .tx_i_0(ch0tx),.tx_q_0(ch1tx), 167 .tx_i_0(ch0tx),.tx_q_0(ch1tx), 237 loopback_q_0 <= #1 ch1tx;
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/toplevel/usrp_multi/ |
H A D | usrp_multi.v | 116 wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; //,ch4tx,ch5tx,ch6tx,ch7tx; net 140 assign bb_tx_q0 = ch1tx; 148 .tx_i_0(ch0tx),.tx_q_0(ch1tx), 219 loopback_q_0 <= #1 ch1tx;
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/toplevel/mrfm/ |
H A D | mrfm.v | 101 wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; net
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