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Searched refs:cpnum (Results 1 – 25 of 74) sorted by relevance

123

/dports/databases/grass7/grass-7.8.6/lib/ogsf/
H A Dgsd_cplane.c247 void gsd_draw_cplane_fence(geosurf * surf1, geosurf * surf2, int cpnum) in gsd_draw_cplane_fence() argument
253 if ((was_on = Cp_ison[cpnum])) { in gsd_draw_cplane_fence()
254 gsd_set_clipplane(cpnum, 0); in gsd_draw_cplane_fence()
259 dir[X] = -Cp_norm[cpnum][Y]; in gsd_draw_cplane_fence()
260 dir[Y] = Cp_norm[cpnum][X]; in gsd_draw_cplane_fence()
263 px = Cp_trans[cpnum][X] + Cp_pt[X]; in gsd_draw_cplane_fence()
264 py = Cp_trans[cpnum][Y] + Cp_pt[Y]; in gsd_draw_cplane_fence()
278 fencenorm[X] = -Cp_norm[cpnum][X]; in gsd_draw_cplane_fence()
279 fencenorm[Y] = -Cp_norm[cpnum][Y]; in gsd_draw_cplane_fence()
280 fencenorm[Z] = -Cp_norm[cpnum][Z]; in gsd_draw_cplane_fence()
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/arm/
H A Dmaverick.c183 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
185 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
206 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
207 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
222 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
261 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
265 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
266 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
270 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
271 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/arm/
H A Dmaverick.c183 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
185 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
206 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
207 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
222 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
261 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
265 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
266 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
270 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
271 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Dmaverick.c183 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
185 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
206 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
207 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
222 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
261 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
265 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
266 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
270 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
271 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/arm/
H A Dmaverick.c185 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
187 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
208 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
209 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
224 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
263 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
267 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
268 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
272 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
273 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/arm/
H A Dmaverick.c183 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
185 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
206 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
207 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
222 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
261 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
265 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
266 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
270 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
271 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/gas/testsuite/gas/arm/
H A Dmaverick.c182 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
184 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
205 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
206 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
221 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
260 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
264 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
265 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
269 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
270 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/arm/
H A Dmaverick.c185 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
187 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
208 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
209 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
224 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
263 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
267 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
268 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
272 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
273 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/gas/testsuite/gas/arm/
H A Dmaverick.c182 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
184 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
205 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
206 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
221 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
260 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
264 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
265 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
269 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
270 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Dmaverick.c183 #define CDP2(insname, var, cpnum, opcode1, opcode2, reg1name, reg2name) \ argument
185 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
206 #define CDP2_imm7(insname, cpnum, opcode1, reg1name, reg2name) \ argument
207 mv_insn (insname, , (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8), \
222 (14 << 24) | ((opcode1) << 20) | ((cpnum) << 8) | ((opcode2) << 5), \
261 ((cpnum) << 8) | ((opcode2) << 5) | (1 << 4)), \
265 #define MVDSPARM(insname, cpnum, opcode2, regDSPname) \ argument
266 MCRC2 (mv ## insname, cpnum, 0, 0, opcode2, \
270 #define MVARMDSP(insname, cpnum, opcode2, regDSPname) \ argument
271 MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \
[all …]
/dports/devel/openocd/openocd-0.11.0/src/target/
H A Darm720t.c400 static int arm720t_mrc(struct target *target, int cpnum,
404 static int arm720t_mcr(struct target *target, int cpnum,
493 static int arm720t_mrc(struct target *target, int cpnum, in arm720t_mrc() argument
498 if (cpnum != 15) { in arm720t_mrc()
505 ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), in arm720t_mrc()
510 static int arm720t_mcr(struct target *target, int cpnum, in arm720t_mcr() argument
515 if (cpnum != 15) { in arm720t_mcr()
522 ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), in arm720t_mcr()
H A Darm_dpm.c52 static int dpm_mrc(struct target *target, int cpnum, in dpm_mrc() argument
64 LOG_DEBUG("MRC p%d, %d, r0, c%d, c%d, %d", cpnum, in dpm_mrc()
70 ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), in dpm_mrc()
77 static int dpm_mcr(struct target *target, int cpnum, in dpm_mcr() argument
89 LOG_DEBUG("MCR p%d, %d, r0, c%d, c%d, %d", cpnum, in dpm_mcr()
95 ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), in dpm_mcr()
H A Darm.h229 int (*mrc)(struct target *target, int cpnum,
235 int (*mcr)(struct target *target, int cpnum,
H A Darm920t.c800 static int arm920t_mrc(struct target *target, int cpnum,
804 static int arm920t_mcr(struct target *target, int cpnum,
1603 static int arm920t_mrc(struct target *target, int cpnum, in arm920t_mrc() argument
1608 if (cpnum != 15) { in arm920t_mrc()
1615 ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2), in arm920t_mrc()
1619 static int arm920t_mcr(struct target *target, int cpnum, in arm920t_mcr() argument
1624 if (cpnum != 15) { in arm920t_mcr()
1631 ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2), in arm920t_mcr()
/dports/emulators/mess/mame-mame0226/src/devices/cpu/arm7/
H A Darm7.cpp1279 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_r_callback() local
1285 if (cpnum != 15) in arm7_rt_r_callback()
1290 if (cpnum == 14) in arm7_rt_r_callback()
1395 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_w_callback() local
1398 if (cpnum != 15) in arm7_rt_w_callback()
1400 if (cpnum == 14) in arm7_rt_w_callback()
1505 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_r_callback() local
1509 if (cpnum == 15) in arm7_rt_r_callback()
1563 if (cpnum == 15) in arm7_rt_w_callback()
1816 if (cpnum == 15) in arm7_rt_r_callback()
[all …]
/dports/emulators/mame/mame-mame0226/src/devices/cpu/arm7/
H A Darm7.cpp1279 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_r_callback() local
1285 if (cpnum != 15) in arm7_rt_r_callback()
1290 if (cpnum == 14) in arm7_rt_r_callback()
1395 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_w_callback() local
1398 if (cpnum != 15) in arm7_rt_w_callback()
1400 if (cpnum == 14) in arm7_rt_w_callback()
1505 uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT; in arm7_rt_r_callback() local
1509 if (cpnum == 15) in arm7_rt_r_callback()
1563 if (cpnum == 15) in arm7_rt_w_callback()
1816 if (cpnum == 15) in arm7_rt_r_callback()
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/gdb/rdi-share/
H A Dardi.c1492 cpwords[cpnum] = rmap; in SetCPWords()
1708 int err=RDIError_NoError, cpnum=0; in angel_RDI_info() local
1834 cpnum = *(int *)arg1; in angel_RDI_info()
1843 cpd->regdesc[cpnum].rmin, cpd->regdesc[cpnum].rmax, in angel_RDI_info()
1844 cpd->regdesc[cpnum].nbytes, cpd->regdesc[cpnum].access); in angel_RDI_info()
1845 if ((cpd->regdesc[cpnum].access&0x3) == 0x3){ in angel_RDI_info()
1847 cpd->regdesc[cpnum].accessinst.cprt.read_b0, in angel_RDI_info()
1848 cpd->regdesc[cpnum].accessinst.cprt.read_b1, in angel_RDI_info()
1854 cpd->regdesc[cpnum].accessinst.cpdt.rdbits, in angel_RDI_info()
1879 cpnum = *(int *)arg1; in angel_RDI_info()
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/gdb/rdi-share/
H A Dardi.c1492 cpwords[cpnum] = rmap; in SetCPWords()
1708 int err=RDIError_NoError, cpnum=0; in angel_RDI_info() local
1834 cpnum = *(int *)arg1; in angel_RDI_info()
1843 cpd->regdesc[cpnum].rmin, cpd->regdesc[cpnum].rmax, in angel_RDI_info()
1844 cpd->regdesc[cpnum].nbytes, cpd->regdesc[cpnum].access); in angel_RDI_info()
1845 if ((cpd->regdesc[cpnum].access&0x3) == 0x3){ in angel_RDI_info()
1847 cpd->regdesc[cpnum].accessinst.cprt.read_b0, in angel_RDI_info()
1848 cpd->regdesc[cpnum].accessinst.cprt.read_b1, in angel_RDI_info()
1854 cpd->regdesc[cpnum].accessinst.cpdt.rdbits, in angel_RDI_info()
1879 cpnum = *(int *)arg1; in angel_RDI_info()
[all …]
/dports/cad/zcad/zcad-8b8a693/cad_source/zengine/zgl/drawers/
H A Duzglviewareadata.pas57 cpnum: GDBInteger;
158 cpdist.cpnum := -1;
/dports/lang/erlang-runtime22/otp-OTP-22.3.4.24/lib/hipe/arm/
H A Dhipe_arm_encode.erl355 cdp({{'cond',Cond},{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
358 cdp2({{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
369 ldstc(B20, {{'cond',Cond},{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
375 ldstc2(B20, {{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
443 mcr({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
446 mcr2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
460 mrc({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
463 mrc2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
536 mcrr({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
541 mrrc({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
[all …]
/dports/lang/erlang-runtime23/otp-OTP-23.3.4.10/lib/hipe/arm/
H A Dhipe_arm_encode.erl355 cdp({{'cond',Cond},{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
358 cdp2({{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
369 ldstc(B20, {{'cond',Cond},{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
375 ldstc2(B20, {{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
443 mcr({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
446 mcr2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
460 mrc({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
463 mrc2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
536 mcrr({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
541 mrrc({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
[all …]
/dports/lang/erlang-runtime21/otp-OTP-21.3.8.24/lib/hipe/arm/
H A Dhipe_arm_encode.erl355 cdp({{'cond',Cond},{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
358 cdp2({{cpnum,CpNum},{cpop4,CpOp4},{cr,CRd},{cr,CRn},{cr,CRm},{cpop3,CpOp3}}) ->
369 ldstc(B20, {{'cond',Cond},{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
375 ldstc2(B20, {{l,L},{cpnum,CpNum},{cr,CRd},AddressingMode}) ->
443 mcr({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
446 mcr2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
460 mrc({{'cond',Cond},{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
463 mrc2({{cpnum,CpNum},{cpop3,OP1},{r,Rd},{cr,CRn},{cr,CRm},{cpop3,OP2}}) ->
536 mcrr({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
541 mrrc({{'cond',Cond},{cpnum,CpNum},{cpop4,OP},{r,Rd},{r,Rn},{cr,CRm}}) ->
[all …]
/dports/deskutils/lumina-mediaplayer/lumina-1.6.0/src-qt5/core/libLumina/
H A DLuminaOS-FreeBSD.cpp382 int cpnum = 0; in CPUUsagePercent() local
385 cpnum++; //the number of CPU's accounted for (to average out at the end) in CPUUsagePercent()
398 return qRound(tot/cpnum); in CPUUsagePercent()
/dports/deskutils/lumina-photo/lumina-1.6.0/src-qt5/core/libLumina/
H A DLuminaOS-FreeBSD.cpp382 int cpnum = 0; in CPUUsagePercent() local
385 cpnum++; //the number of CPU's accounted for (to average out at the end) in CPUUsagePercent()
398 return qRound(tot/cpnum); in CPUUsagePercent()
/dports/deskutils/lumina-screenshot/lumina-1.6.0/src-qt5/core/libLumina/
H A DLuminaOS-FreeBSD.cpp382 int cpnum = 0; in CPUUsagePercent() local
385 cpnum++; //the number of CPU's accounted for (to average out at the end) in CPUUsagePercent()
398 return qRound(tot/cpnum); in CPUUsagePercent()

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