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/dports/games/shockolate/systemshock-0.8.2-43-ga9eb1b93/src/GameSrc/
H A Dcone.c127 uchar extra_div = TRUE; in clockwise_poly() local
133 while (extra_div) { in clockwise_poly()
136 extra_div = FALSE; in clockwise_poly()
142 if (extra_div) in clockwise_poly()
191 uchar extra_div = TRUE; in insert_viewer_position() local
200 while (extra_div) { in insert_viewer_position()
201 extra_div = FALSE; in insert_viewer_position()
208 extra_div = TRUE; in insert_viewer_position()
210 if (extra_div) { in insert_viewer_position()
459 while (extra_div) { in radius_fix()
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-tegra/
H A Dclock.c309 unsigned long rate, int *extra_div) in find_best_divider() argument
327 *extra_div = 1 << shift; in find_best_divider()
366 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
379 if (extra_div) in clock_adjust_periph_pll_div()
380 *extra_div = xdiv; in clock_adjust_periph_pll_div()
391 if (extra_div) in clock_adjust_periph_pll_div()
392 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c369 unsigned long rate, int *extra_div) in find_best_divider() argument
387 *extra_div = 1 << shift; in find_best_divider()
440 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
453 if (extra_div) in clock_adjust_periph_pll_div()
454 *extra_div = xdiv; in clock_adjust_periph_pll_div()
465 if (extra_div) in clock_adjust_periph_pll_div()
466 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c369 unsigned long rate, int *extra_div) in find_best_divider() argument
387 *extra_div = 1 << shift; in find_best_divider()
440 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
453 if (extra_div) in clock_adjust_periph_pll_div()
454 *extra_div = xdiv; in clock_adjust_periph_pll_div()
465 if (extra_div) in clock_adjust_periph_pll_div()
466 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c369 unsigned long rate, int *extra_div) in find_best_divider() argument
387 *extra_div = 1 << shift; in find_best_divider()
440 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
453 if (extra_div) in clock_adjust_periph_pll_div()
454 *extra_div = xdiv; in clock_adjust_periph_pll_div()
465 if (extra_div) in clock_adjust_periph_pll_div()
466 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-tegra/
H A Dclock.c369 unsigned long rate, int *extra_div) in find_best_divider() argument
387 *extra_div = 1 << shift; in find_best_divider()
440 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
453 if (extra_div) in clock_adjust_periph_pll_div()
454 *extra_div = xdiv; in clock_adjust_periph_pll_div()
465 if (extra_div) in clock_adjust_periph_pll_div()
466 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c372 unsigned long rate, int *extra_div) in find_best_divider() argument
390 *extra_div = 1 << shift; in find_best_divider()
443 enum clock_id parent, unsigned rate, int *extra_div) in clock_adjust_periph_pll_div() argument
456 if (extra_div) in clock_adjust_periph_pll_div()
457 *extra_div = xdiv; in clock_adjust_periph_pll_div()
468 if (extra_div) in clock_adjust_periph_pll_div()
469 effective_rate /= *extra_div; in clock_adjust_periph_pll_div()

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