/dports/emulators/qemu42/qemu-4.2.1/hw/intc/ |
H A D | arm_gicv3_kvm.c | 478 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 480 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 483 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 486 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 492 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 494 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 632 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 634 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 637 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 640 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 677 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 678 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 679 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 891 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1044 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1083 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1084 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1085 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1478 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1512 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu/qemu-6.2.0/hw/intc/ |
H A D | arm_gicv3_kvm.c | 476 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 478 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 482 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 486 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 492 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 494 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 634 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 636 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 640 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 644 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 684 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 685 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 686 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 898 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1053 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1092 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1093 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1094 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1505 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1539 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu60/qemu-6.0.0/hw/intc/ |
H A D | arm_gicv3_kvm.c | 477 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 479 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 483 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 487 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 493 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 495 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 635 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 637 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 641 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 645 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 681 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 682 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 683 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 895 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1048 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1087 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1088 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1089 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1482 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1516 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/ |
H A D | arm_gicv3_kvm.c | 480 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 482 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 485 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 488 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 494 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 496 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 634 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 636 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 639 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 642 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 676 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 677 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 678 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 890 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1043 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1082 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1083 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1084 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1477 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1511 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu5/qemu-5.2.0/hw/intc/ |
H A D | arm_gicv3_kvm.c | 477 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 479 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 482 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 485 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 491 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 493 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 631 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 633 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 636 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 639 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 681 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 682 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 683 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 895 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1048 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1087 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1088 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1089 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1482 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1516 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/ |
H A D | arm_gicv3_kvm.c | 478 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 480 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 483 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 486 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 492 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 494 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 632 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 634 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 637 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 640 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 677 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 678 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 679 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 891 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1044 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1083 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1084 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1085 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1478 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1512 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/ |
H A D | arm_gicv3_kvm.c | 478 reg64 = c->icc_apr[GICV3_G0][3]; 480 reg64 = c->icc_apr[GICV3_G0][2]; 483 reg64 = c->icc_apr[GICV3_G0][1]; 486 reg64 = c->icc_apr[GICV3_G0][0]; 492 reg64 = c->icc_apr[GICV3_G1NS][3]; 494 reg64 = c->icc_apr[GICV3_G1NS][2]; 632 c->icc_apr[GICV3_G0][3] = reg64; 634 c->icc_apr[GICV3_G0][2] = reg64; 637 c->icc_apr[GICV3_G0][1] = reg64; 640 c->icc_apr[GICV3_G0][0] = reg64; [all …]
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H A D | arm_gicv3_cpuif.c | 680 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 681 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 682 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 894 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1047 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1086 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1087 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1088 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1481 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1515 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/ |
H A D | arm_gicv3_kvm.c | 478 reg64 = c->icc_apr[GICV3_G0][3]; in kvm_arm_gicv3_put() 480 reg64 = c->icc_apr[GICV3_G0][2]; in kvm_arm_gicv3_put() 483 reg64 = c->icc_apr[GICV3_G0][1]; in kvm_arm_gicv3_put() 486 reg64 = c->icc_apr[GICV3_G0][0]; in kvm_arm_gicv3_put() 492 reg64 = c->icc_apr[GICV3_G1NS][3]; in kvm_arm_gicv3_put() 494 reg64 = c->icc_apr[GICV3_G1NS][2]; in kvm_arm_gicv3_put() 632 c->icc_apr[GICV3_G0][3] = reg64; in kvm_arm_gicv3_get() 634 c->icc_apr[GICV3_G0][2] = reg64; in kvm_arm_gicv3_get() 637 c->icc_apr[GICV3_G0][1] = reg64; in kvm_arm_gicv3_get() 640 c->icc_apr[GICV3_G0][0] = reg64; in kvm_arm_gicv3_get() [all …]
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H A D | arm_gicv3_cpuif.c | 680 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 681 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 682 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 894 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1047 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1086 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1087 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1088 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1481 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1515 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/ |
H A D | arm_gicv3_kvm.c | 476 reg64 = c->icc_apr[GICV3_G0][3]; 478 reg64 = c->icc_apr[GICV3_G0][2]; 482 reg64 = c->icc_apr[GICV3_G0][1]; 486 reg64 = c->icc_apr[GICV3_G0][0]; 492 reg64 = c->icc_apr[GICV3_G1NS][3]; 494 reg64 = c->icc_apr[GICV3_G1NS][2]; 634 c->icc_apr[GICV3_G0][3] = reg64; 636 c->icc_apr[GICV3_G0][2] = reg64; 640 c->icc_apr[GICV3_G0][1] = reg64; 644 c->icc_apr[GICV3_G0][0] = reg64; [all …]
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H A D | arm_gicv3_cpuif.c | 683 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_prio() 684 uint32_t apr = cs->icc_apr[GICV3_G0][i] | in icc_highest_active_prio() 685 cs->icc_apr[GICV3_G1][i] | cs->icc_apr[GICV3_G1NS][i]; in icc_highest_active_prio() 897 cs->icc_apr[cs->hppi.grp][regno] |= (1 << regbit); in icc_activate_irq() 1052 uint64_t *papr = &cs->icc_apr[grp][i]; in icc_drop_prio() 1091 for (i = 0; i < ARRAY_SIZE(cs->icc_apr[0]); i++) { in icc_highest_active_group() 1092 int g0ctz = ctz32(cs->icc_apr[GICV3_G0][i]); in icc_highest_active_group() 1093 int g1ctz = ctz32(cs->icc_apr[GICV3_G1][i]); in icc_highest_active_group() 1505 value = cs->icc_apr[grp][regno]; in icc_ap_read() 1539 cs->icc_apr[grp][regno] = value & 0xFFFFFFFFU; in icc_ap_write() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu/qemu-6.2.0/include/hw/intc/ |
H A D | arm_gicv3_common.h | 183 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu60/qemu-6.0.0/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu5/qemu-5.2.0/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4]; member
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/intc/ |
H A D | arm_gicv3_common.h | 181 uint64_t icc_apr[3][4];
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