| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 138 if (TII->mayReadEXEC(*MRI, *I)) in skipIgnoreExecInsts()
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| H A D | SIInstrInfo.h | 693 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 138 if (TII->mayReadEXEC(*MRI, *I)) in skipIgnoreExecInsts()
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| H A D | SIInstrInfo.h | 693 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 138 if (TII->mayReadEXEC(*MRI, *I)) in skipIgnoreExecInsts()
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 137 if (TII->mayReadEXEC(*MRI, *I)) in skipIgnoreExecInsts()
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| H A D | SIInstrInfo.h | 676 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 464 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| H A D | SIWholeQuadMode.cpp | 713 if (MI.isTerminator() || TII->mayReadEXEC(*MRI, MI)) { in processBlock()
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| H A D | SIInstrInfo.h | 702 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 464 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| H A D | SIWholeQuadMode.cpp | 713 if (MI.isTerminator() || TII->mayReadEXEC(*MRI, MI)) { in processBlock()
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| H A D | SIInstrInfo.h | 702 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 472 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| H A D | SIWholeQuadMode.cpp | 819 if (MI.isTerminator() || TII->mayReadEXEC(*MRI, MI)) { in processBlock()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 433 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 433 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 456 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| H A D | SIWholeQuadMode.cpp | 801 if (MI.isTerminator() || TII->mayReadEXEC(*MRI, MI)) { in processBlock()
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 433 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 436 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 433 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 456 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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| H A D | SIWholeQuadMode.cpp | 801 if (MI.isTerminator() || TII->mayReadEXEC(*MRI, MI)) { in processBlock()
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| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 433 if (TII->mayReadEXEC(*MRI, *It)) in skipIgnoreExecInstsTrivialSucc()
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