| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 144 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
300 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
743 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
747 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
750 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 144 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
300 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
743 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
747 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
750 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 144 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
300 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
743 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
747 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
750 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 144 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
300 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
743 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
747 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
750 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 148 reg = readl(&ccm_anatop->pll_enet); in decode_pll()
304 reg = readl(&ccm_anatop->pll_enet); in mxc_get_pll_enet_derive()
747 reg = readl(&ccm_anatop->pll_enet); in enable_pll_enet()
751 writel(reg, &ccm_anatop->pll_enet); in enable_pll_enet()
754 if (readl(&ccm_anatop->pll_enet) & ANADIG_PLL_LOCK) in enable_pll_enet()
|