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Searched refs:ram_block3a_10 (Results 1 – 2 of 2) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/megacells/
H A Dfifo_2k.v1852 cyclone_ram_block ram_block3a_10 instance
1889 ram_block3a_10.operation_mode = "dual_port",
1890 ram_block3a_10.port_a_address_width = 11,
1891 ram_block3a_10.port_a_data_width = 1,
1892 ram_block3a_10.port_a_first_address = 0,
1894 ram_block3a_10.port_a_last_address = 2047,
1899 ram_block3a_10.port_b_address_width = 11,
1902 ram_block3a_10.port_b_data_width = 1,
1903 ram_block3a_10.port_b_first_address = 0,
1905 ram_block3a_10.port_b_last_address = 2047,
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H A Dfifo_4k.v1944 cyclone_ram_block ram_block3a_10 instance
1981 ram_block3a_10.operation_mode = "dual_port",
1982 ram_block3a_10.port_a_address_width = 12,
1983 ram_block3a_10.port_a_data_width = 1,
1984 ram_block3a_10.port_a_first_address = 0,
1986 ram_block3a_10.port_a_last_address = 4095,
1991 ram_block3a_10.port_b_address_width = 12,
1994 ram_block3a_10.port_b_data_width = 1,
1995 ram_block3a_10.port_b_first_address = 0,
1997 ram_block3a_10.port_b_last_address = 4095,
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