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Searched refs:reg_saved (Results 1 – 25 of 81) sorted by relevance

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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h170 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
173 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
186 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
194 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
203 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
214 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
223 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
237 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
257 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
270 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
161 sctx->tracked_regs.reg_saved |= 0x1ull << (reg); \
174 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x3) != 0x3 || \
182 sctx->tracked_regs.reg_saved |= 0x3ull << (reg); \
191 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x7) != 0x7 || \
202 sctx->tracked_regs.reg_saved |= 0x7ull << (reg); \
211 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0xf) != 0xf || \
225 sctx->tracked_regs.reg_saved |= 0xfull << (reg); \
242 if (((sctx->tracked_regs.reg_saved >> (reg)) & 0x1) != 0x1 || \
245 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
[all …]
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h158 if (((sctx->tracked_regs.reg_saved >> reg) & 0x1) != 0x1 || in radeon_opt_set_context_reg_rmw()
162 sctx->tracked_regs.reg_saved |= 0x1ull << reg; in radeon_opt_set_context_reg_rmw()
173 if (((sctx->tracked_regs.reg_saved >> reg) & 0x1) != 0x1 || in radeon_opt_set_context_reg()
177 sctx->tracked_regs.reg_saved |= 0x1ull << reg; in radeon_opt_set_context_reg()
194 if (((sctx->tracked_regs.reg_saved >> reg) & 0x3) != 0x3 || in radeon_opt_set_context_reg2()
203 sctx->tracked_regs.reg_saved |= 0x3ull << reg; in radeon_opt_set_context_reg2()
216 if (((sctx->tracked_regs.reg_saved >> reg) & 0x7) != 0x7 || in radeon_opt_set_context_reg3()
228 sctx->tracked_regs.reg_saved |= 0x7ull << reg; in radeon_opt_set_context_reg3()
241 if (((sctx->tracked_regs.reg_saved >> reg) & 0xf) != 0xf || in radeon_opt_set_context_reg4()
256 sctx->tracked_regs.reg_saved |= 0xfull << reg; in radeon_opt_set_context_reg4()
/dports/devel/gdb/gdb-11.1/gdb/
H A Dnios2-tdep.c78 struct reg_saved struct
103 struct reg_saved reg_saved[NIOS2_NUM_REGS]; member
258 cache->reg_saved[i].basereg = -1; in nios2_setup_default()
259 cache->reg_saved[i].addr = 0; in nios2_setup_default()
1291 cache->reg_saved[i].basereg = -1; in nios2_analyze_prologue()
1434 cache->reg_saved[orig].basereg in nios2_analyze_prologue()
1436 cache->reg_saved[orig].addr in nios2_analyze_prologue()
1627 cache->reg_saved[i].addr += frame_high; in nios2_analyze_prologue()
1640 cache->reg_saved[i].addr += gp; in nios2_analyze_prologue()
1658 = cache->reg_saved[NIOS2_ESTATUS_REGNUM]; in nios2_analyze_prologue()
[all …]
H A Dtic6x-tdep.c78 CORE_ADDR reg_saved[TIC6X_NUM_CORE_REGS]; member
134 cache->reg_saved[i] = -1; in tic6x_setup_default()
213 cache->reg_saved[src_reg] = ((inst >> 13) & 0x1f) << 2; in tic6x_analyze_prologue()
263 if (cache->reg_saved[TIC6X_FP_REGNUM] != -1) in tic6x_analyze_prologue()
284 if (cache->reg_saved[i] != -1) in tic6x_analyze_prologue()
285 cache->reg_saved[i] = cache->base + cache->reg_saved[i]; in tic6x_analyze_prologue()
443 if (regnum < TIC6X_NUM_CORE_REGS && cache->reg_saved[regnum] != -1) in tic6x_frame_prev_register()
445 cache->reg_saved[regnum]); in tic6x_frame_prev_register()
/dports/lang/mono/mono-5.10.1.57/mono/mini/
H A Dunwind.c486 …int_dwarf_state (int cfa_reg, int cfa_offset, int ip, int nregs, Loc *locations, guint8 *reg_saved) in print_dwarf_state() argument
493 if (reg_saved [i] && locations [i].loc_type == LOC_OFFSET) in print_dwarf_state()
500 guint8 reg_saved [NUM_HW_REGS]; member
522 guint8 reg_saved [NUM_HW_REGS]; in mono_unwind_frame() local
529 memset (reg_saved, 0, sizeof (reg_saved)); in mono_unwind_frame()
550 reg_saved [hwreg] = TRUE; in mono_unwind_frame()
573 reg_saved [hwreg] = TRUE; in mono_unwind_frame()
582 reg_saved [hwreg] = TRUE; in mono_unwind_frame()
605 memcpy (&state_stack [0].reg_saved, &reg_saved, sizeof (reg_saved)); in mono_unwind_frame()
614 memcpy (&reg_saved, &state_stack [0].reg_saved, sizeof (reg_saved)); in mono_unwind_frame()
[all …]
/dports/devel/gdb761/gdb-7.6.1/gdb/
H A Dtic6x-tdep.c83 CORE_ADDR reg_saved[TIC6X_NUM_CORE_REGS]; member
139 cache->reg_saved[i] = -1; in tic6x_setup_default()
222 cache->reg_saved[src_reg] = ((inst >> 13) & 0x1f) << 2; in tic6x_analyze_prologue()
272 if (cache->reg_saved[TIC6X_FP_REGNUM] != -1) in tic6x_analyze_prologue()
293 if (cache->reg_saved[i] != -1) in tic6x_analyze_prologue()
294 cache->reg_saved[i] = cache->base + cache->reg_saved[i]; in tic6x_analyze_prologue()
462 if (regnum < TIC6X_NUM_CORE_REGS && cache->reg_saved[regnum] != -1) in tic6x_frame_prev_register()
464 cache->reg_saved[regnum]); in tic6x_frame_prev_register()
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/v850/
H A Dv850.c1452 long reg_saved = 0; in compute_register_save_size() local
1468 reg_saved |= 1L << i; in compute_register_save_size()
1511 reg_saved |= 1L << i; in compute_register_save_size()
1522 reg_saved |= 1L << i; in compute_register_save_size()
1528 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1538 reg_saved |= 1L << i; in compute_register_save_size()
1544 *p_reg_saved = reg_saved; in compute_register_save_size()
1572 long reg_saved = 0; in expand_prologue() local
1616 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1786 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/config/v850/
H A Dv850.c1514 long reg_saved = 0; in compute_register_save_size() local
1530 reg_saved |= 1L << i; in compute_register_save_size()
1573 reg_saved |= 1L << i; in compute_register_save_size()
1584 reg_saved |= 1L << i; in compute_register_save_size()
1590 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1600 reg_saved |= 1L << i; in compute_register_save_size()
1606 *p_reg_saved = reg_saved; in compute_register_save_size()
1634 long reg_saved = 0; in expand_prologue() local
1678 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1848 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/config/v850/
H A Dv850.c1514 long reg_saved = 0; in compute_register_save_size() local
1530 reg_saved |= 1L << i; in compute_register_save_size()
1573 reg_saved |= 1L << i; in compute_register_save_size()
1584 reg_saved |= 1L << i; in compute_register_save_size()
1590 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1600 reg_saved |= 1L << i; in compute_register_save_size()
1606 *p_reg_saved = reg_saved; in compute_register_save_size()
1634 long reg_saved = 0; in expand_prologue() local
1678 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1848 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/lang/gcc48/gcc-4.8.5/gcc/config/v850/
H A Dv850.c1448 long reg_saved = 0; in compute_register_save_size() local
1460 reg_saved |= 1L << i; in compute_register_save_size()
1504 reg_saved |= 1L << i; in compute_register_save_size()
1515 reg_saved |= 1L << i; in compute_register_save_size()
1521 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1531 reg_saved |= 1L << i; in compute_register_save_size()
1537 *p_reg_saved = reg_saved; in compute_register_save_size()
1649 long reg_saved = 0; in expand_prologue() local
1678 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1824 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/v850/
H A Dv850.c1448 long reg_saved = 0; in compute_register_save_size() local
1460 reg_saved |= 1L << i; in compute_register_save_size()
1504 reg_saved |= 1L << i; in compute_register_save_size()
1515 reg_saved |= 1L << i; in compute_register_save_size()
1521 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1531 reg_saved |= 1L << i; in compute_register_save_size()
1537 *p_reg_saved = reg_saved; in compute_register_save_size()
1649 long reg_saved = 0; in expand_prologue() local
1678 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1824 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/v850/
H A Dv850.c1452 long reg_saved = 0; in compute_register_save_size() local
1464 reg_saved |= 1L << i; in compute_register_save_size()
1508 reg_saved |= 1L << i; in compute_register_save_size()
1519 reg_saved |= 1L << i; in compute_register_save_size()
1525 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1535 reg_saved |= 1L << i; in compute_register_save_size()
1541 *p_reg_saved = reg_saved; in compute_register_save_size()
1653 long reg_saved = 0; in expand_prologue() local
1682 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1828 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/v850/
H A Dv850.c1454 long reg_saved = 0; in compute_register_save_size() local
1466 reg_saved |= 1L << i; in compute_register_save_size()
1510 reg_saved |= 1L << i; in compute_register_save_size()
1521 reg_saved |= 1L << i; in compute_register_save_size()
1527 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1537 reg_saved |= 1L << i; in compute_register_save_size()
1543 *p_reg_saved = reg_saved; in compute_register_save_size()
1655 long reg_saved = 0; in expand_prologue() local
1684 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1828 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/lang/gcc9/gcc-9.4.0/gcc/config/v850/
H A Dv850.c1450 long reg_saved = 0; in compute_register_save_size() local
1462 reg_saved |= 1L << i; in compute_register_save_size()
1506 reg_saved |= 1L << i; in compute_register_save_size()
1517 reg_saved |= 1L << i; in compute_register_save_size()
1523 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1533 reg_saved |= 1L << i; in compute_register_save_size()
1539 *p_reg_saved = reg_saved; in compute_register_save_size()
1651 long reg_saved = 0; in expand_prologue() local
1680 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1827 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/v850/
H A Dv850.c1451 long reg_saved = 0; in compute_register_save_size() local
1463 reg_saved |= 1L << i; in compute_register_save_size()
1507 reg_saved |= 1L << i; in compute_register_save_size()
1518 reg_saved |= 1L << i; in compute_register_save_size()
1524 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1534 reg_saved |= 1L << i; in compute_register_save_size()
1540 *p_reg_saved = reg_saved; in compute_register_save_size()
1652 long reg_saved = 0; in expand_prologue() local
1681 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1825 long reg_saved = 0; in expand_epilogue() local
[all …]
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/v850/
H A Dv850.c1426 long reg_saved = 0; in compute_register_save_size() local
1438 reg_saved |= 1L << i; in compute_register_save_size()
1482 reg_saved |= 1L << i; in compute_register_save_size()
1493 reg_saved |= 1L << i; in compute_register_save_size()
1499 reg_saved |= 1L << LINK_POINTER_REGNUM; in compute_register_save_size()
1509 reg_saved |= 1L << i; in compute_register_save_size()
1515 *p_reg_saved = reg_saved; in compute_register_save_size()
1627 long reg_saved = 0; in expand_prologue() local
1656 if (((1L << i) & reg_saved) != 0) in expand_prologue()
1803 long reg_saved = 0; in expand_epilogue() local
[all …]

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