riscv_masked_atomicrmw_umin_i32 (reference) in projects: dports

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Searched refs:riscv_masked_atomicrmw_umin_i32 (Results 1 – 17 of 17) sorted by relevance

/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
H A D	IntrinsicsRISCV.h	`28 riscv_masked_atomicrmw_umin_i32, // llvm.riscv.masked.atomicrmw.umin.i32 enumerator`
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`193 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 1750 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp32()`
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`227 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2553 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`253 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2782 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`285 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2893 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`261 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2816 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`261 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2816 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`284 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 2873 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`316 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 3336 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`507 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 4364 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`507 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 4364 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`902 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 8774 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`902 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 8774 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`902 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 8774 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`902 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 8774 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`902 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 8774 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	`967 case Intrinsic::riscv_masked_atomicrmw_umin_i32: in getTgtMemIntrinsic() 9574 return Intrinsic::riscv_masked_atomicrmw_umin_i32; in getIntrinsicForMaskedAtomicRMWBinOp()`