/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 463 npu2_scom_write(gcid, scom_base, in set_npcq_config() 481 npu2_scom_write(gcid, scom_base, in set_npcq_config() 494 npu2_scom_write(gcid, scom_base, in set_npcq_config() 539 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 560 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 698 npu2_scom_write(gcid, scom_base, in address_translation_config() 715 npu2_scom_write(gcid, scom_base, in address_translation_config() 777 write_bar(gcid, scom_base, in setup_global_mmio_bar() 782 write_bar(gcid, scom_base, in setup_global_mmio_bar() 788 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 36 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 41 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in npu2_scom_set_addr() 44 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 48 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 49 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); in npu2_scom_write() 52 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 57 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 58 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); in npu2_scom_read()
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H A D | npu2-hw-procedures.c | 112 #define NPU2_PHY_REG(scom_base, reg, lane) \ argument 113 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane)
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 463 npu2_scom_write(gcid, scom_base, in set_npcq_config() 481 npu2_scom_write(gcid, scom_base, in set_npcq_config() 494 npu2_scom_write(gcid, scom_base, in set_npcq_config() 539 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 560 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 698 npu2_scom_write(gcid, scom_base, in address_translation_config() 715 npu2_scom_write(gcid, scom_base, in address_translation_config() 777 write_bar(gcid, scom_base, in setup_global_mmio_bar() 782 write_bar(gcid, scom_base, in setup_global_mmio_bar() 788 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 36 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 41 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in npu2_scom_set_addr() 44 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 48 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 49 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); in npu2_scom_write() 52 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 57 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 58 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); in npu2_scom_read()
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H A D | npu2-hw-procedures.c | 112 #define NPU2_PHY_REG(scom_base, reg, lane) \ argument 113 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane)
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 463 npu2_scom_write(gcid, scom_base, in set_npcq_config() 481 npu2_scom_write(gcid, scom_base, in set_npcq_config() 494 npu2_scom_write(gcid, scom_base, in set_npcq_config() 539 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 560 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 698 npu2_scom_write(gcid, scom_base, in address_translation_config() 715 npu2_scom_write(gcid, scom_base, in address_translation_config() 777 write_bar(gcid, scom_base, in setup_global_mmio_bar() 782 write_bar(gcid, scom_base, in setup_global_mmio_bar() 788 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 36 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 41 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in npu2_scom_set_addr() 44 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 48 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 49 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); in npu2_scom_write() 52 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 57 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 58 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); in npu2_scom_read()
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H A D | npu2-hw-procedures.c | 112 #define NPU2_PHY_REG(scom_base, reg, lane) \ argument 113 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane)
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 463 npu2_scom_write(gcid, scom_base, in set_npcq_config() 481 npu2_scom_write(gcid, scom_base, in set_npcq_config() 494 npu2_scom_write(gcid, scom_base, in set_npcq_config() 539 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 560 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 698 npu2_scom_write(gcid, scom_base, in address_translation_config() 715 npu2_scom_write(gcid, scom_base, in address_translation_config() 777 write_bar(gcid, scom_base, in setup_global_mmio_bar() 782 write_bar(gcid, scom_base, in setup_global_mmio_bar() 788 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 36 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, 41 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in op_display_to_port80() 44 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, 48 npu2_scom_set_addr(gcid, scom_base, reg, size); 49 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); 52 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 57 npu2_scom_set_addr(gcid, scom_base, reg, size); 58 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val);
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H A D | npu2-hw-procedures.c | 112 #define NPU2_PHY_REG(scom_base, reg, lane) \ in lpc_rtc_write_tm() 113 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane) in lpc_rtc_write_tm()
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 463 npu2_scom_write(gcid, scom_base, in set_npcq_config() 481 npu2_scom_write(gcid, scom_base, in set_npcq_config() 494 npu2_scom_write(gcid, scom_base, in set_npcq_config() 539 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 560 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 698 npu2_scom_write(gcid, scom_base, in address_translation_config() 715 npu2_scom_write(gcid, scom_base, in address_translation_config() 777 write_bar(gcid, scom_base, in setup_global_mmio_bar() 782 write_bar(gcid, scom_base, in setup_global_mmio_bar() 788 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 36 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 41 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in npu2_scom_set_addr() 44 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 48 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 49 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); in npu2_scom_write() 52 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 57 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 58 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); in npu2_scom_read()
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
H A D | npu2-opencapi.c | 449 npu2_scom_write(gcid, scom_base, in set_npcq_config() 467 npu2_scom_write(gcid, scom_base, in set_npcq_config() 480 npu2_scom_write(gcid, scom_base, in set_npcq_config() 525 npu2_scom_write(gcid, scom_base, in enable_sm_allocation() 546 npu2_scom_write(gcid, scom_base, in enable_pb_snooping() 684 npu2_scom_write(gcid, scom_base, in address_translation_config() 701 npu2_scom_write(gcid, scom_base, in address_translation_config() 763 write_bar(gcid, scom_base, in setup_global_mmio_bar() 768 write_bar(gcid, scom_base, in setup_global_mmio_bar() 774 write_bar(gcid, scom_base, in setup_global_mmio_bar() [all …]
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H A D | npu2-common.c | 23 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 28 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); in npu2_scom_set_addr() 31 void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 35 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 36 xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); in npu2_scom_write() 39 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 44 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 45 xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); in npu2_scom_read()
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H A D | npu2-hw-procedures.c | 111 #define NPU2_PHY_REG(scom_base, reg, lane) \ argument 112 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane)
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
H A D | npu2.c | 81 static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, in npu2_scom_set_addr() argument 89 xscom_write(gcid, scom_base + isa, addr); in npu2_scom_set_addr() 92 static void npu2_scom_write(uint64_t gcid, uint64_t scom_base, in npu2_scom_write() argument 99 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_write() 100 xscom_write(gcid, scom_base + isd, val); in npu2_scom_write() 103 static uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, in npu2_scom_read() argument 110 npu2_scom_set_addr(gcid, scom_base, reg, size); in npu2_scom_read() 111 xscom_read(gcid, scom_base + isd, &val); in npu2_scom_read()
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H A D | npu2-hw-procedures.c | 102 #define NPU2_PHY_REG(scom_base, reg, lane) \ argument 103 SETFIELD(PPC_BITMASK(27, 31), ((reg)->offset << 42) | scom_base, lane)
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/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/ |
H A D | npu2-regs.h | 26 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 28 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/ |
H A D | npu2-regs.h | 26 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 28 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/ |
H A D | npu2-regs.h | 26 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 28 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/ |
H A D | npu2-regs.h | 26 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 28 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/ |
H A D | npu2-regs.h | 13 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 15 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/ |
H A D | npu2-regs.h | 26 uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, 28 void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
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