Searched refs:FMOV (Results 1 – 16 of 16) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedPredNeoverse.td | 72 // FMOV Hd, WZR 73 // FMOV Hd, XZR 74 // FMOV Sd, WZR 75 // FMOV Dd, XZR
|
H A D | AArch64SchedExynosM3.td | 556 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[DS][ir]")>; 561 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[WX][DS]r")>; 562 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[DS][WX]r")>; 563 def : InstRW<[M3WriteNEONI], (instregex "^FMOV(DX|XD)Highr")>;
|
H A D | AArch64SchedExynosM5.td | 726 def : InstRW<[M5WriteNALU1], (instregex "^FMOV[HSD]i")>; 727 def : InstRW<[M5WriteNALU2], (instregex "^FMOV[HSD]r")>; 728 def : InstRW<[M5WriteSA], (instregex "^FMOV[WX][HSD]r")>; 729 def : InstRW<[M5WriteFCVTA], (instregex "^FMOV[HSD][WX]r")>;
|
H A D | AArch64SchedFalkorDetails.td | 1149 def : InstRW<[FalkorWr_FMOV], (instregex "^FMOV(WS|XD|XDHigh)r$")>; 1150 def : InstRW<[FalkorWr_1GTOV_0cyc], (instregex "^FMOV(S|D)i$")>; // imm fwd 1153 def : InstRW<[FalkorWr_1VTOG_1cyc], (instregex "^FMOV(SW|DX|DXHigh)r$")>; 1154 def : InstRW<[FalkorWr_1VXVY_0cyc], (instregex "^FMOV(Sr|Dr|v.*_ns)$")>; // imm fwd
|
H A D | AArch64SchedAmpere1.td | 929 def : InstRW<[Ampere1Write_5cyc_1BS], (instregex "^FMOV[HSD][WX]r")>; 931 def : InstRW<[Ampere1Write_2cyc_1XY], (instregex "^FMOV[HSD][ri]")>; 933 def : InstRW<[Ampere1Write_4cyc_1Z], (instregex "^FMOV[WX][HSD]r")>;
|
H A D | AArch64SchedAmpere1B.td | 911 def : InstRW<[Ampere1BWrite_5cyc_1BS], (instregex "^FMOV[HSD][WX]r")>; 913 def : InstRW<[Ampere1BWrite_2cyc_1XY], (instregex "^FMOV[HSD][ri]")>; 915 def : InstRW<[Ampere1BWrite_3cyc_1Z], (instregex "^FMOV[WX][HSD]r")>;
|
H A D | AArch64SchedExynosM4.td | 669 def : InstRW<[M4WriteNALU1], (instregex "^FMOV[HSD][ir]")>; 670 def : InstRW<[M4WriteSA], (instregex "^FMOV[WX][HSD]r")>; 671 def : InstRW<[M4WriteNEONJ], (instregex "^FMOV[HSD][WX]r")>;
|
H A D | AArch64SchedTSV110.td | 518 def : InstRW<[TSV110Wr_2cyc_1FSU1], (instregex "^FMOV(DX|WS|XD|SW|DXHigh|XDHigh)r$")>; 519 def : InstRW<[TSV110Wr_2cyc_1F], (instregex "^FMOV[SD][ir]$")>;
|
H A D | AArch64ISelLowering.h | 185 FMOV, enumerator
|
H A D | AArch64SchedKryoDetails.td | 861 (instregex "FMOV(XDHigh|DXHigh|DX)r")>; 867 (instregex "FMOV(Di|Dr|Si|Sr|SWr|WSr|XDr|v.*_ns)")>;
|
H A D | AArch64InstrInfo.td | 715 def AArch64fmov : SDNode<"AArch64ISD::FMOV", SDT_AArch64MOVIedit>; 4579 defm FMOV : UnscaledConversion<"fmov">; 4581 // Add pseudo ops for FMOV 0 so we can mark them as isReMaterializable 4621 defm FMOV : SingleOperandFPDataNoException<0b0000, "fmov">; 4870 defm FMOV : FPMoveImmediate<"fmov">; 7025 // AdvSIMD FMOV 9098 // EXTRACT_SUBREG instruction, which will become FMOV. This is easier for the
|
H A D | AArch64ISelLowering.cpp | 2438 MAKE_CASE(AArch64ISD::FMOV) in getTargetNodeName() 12930 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector() 12945 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector()
|
H A D | AArch64InstrFormats.td | 5181 // Unscaled integer <-> floating point conversion (i.e. FMOV)
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MicroMipsInstrFPU.td | 162 defm FMOV : ABSS_MMM<"mov.d", II_MOV_D>, ABS_FM_MM<1, 0x1>;
|
H A D | MipsInstrFPU.td | 593 defm FMOV : ABSS_M<"mov.d", II_MOV_D>, ABSS_FM<0x6, 17>, ISA_MIPS1;
|
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrInfoF1.td | 155 defm FMOV : FT_MOV<0b000100, "fmov">;
|