Searched refs:MAD (Results 1 – 16 of 16) sorted by relevance
| /freebsd/contrib/ofed/opensm/include/vendor/ |
| H A D | osm_vendor.h | 69 #error No MAD Interface selected!
|
| /freebsd/share/monetdef_unicode/ |
| H A D | ar_MA.UTF-8.src | 7 MAD
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrHFP.td | 195 def MAD : TernaryRXF<"mad", 0xED3E, null_frag, FP64, FP64, load, 8>;
|
| /freebsd/usr.bin/units/ |
| H A D | definitions.units | 453 MAD moroccodirham
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6670 MachineInstr *MAD = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genFNegatedMAD() local
6673 const TargetRegisterClass *RC = MRI.getRegClass(MAD->getOperand(0).getReg()); in genFNegatedMAD()
6682 Register SrcReg0 = MAD->getOperand(1).getReg(); in genFNegatedMAD()
6683 Register SrcReg1 = MAD->getOperand(2).getReg(); in genFNegatedMAD()
6684 Register SrcReg2 = MAD->getOperand(3).getReg(); in genFNegatedMAD()
6685 bool Src0IsKill = MAD->getOperand(1).isKill(); in genFNegatedMAD()
6686 bool Src1IsKill = MAD->getOperand(2).isKill(); in genFNegatedMAD()
6687 bool Src2IsKill = MAD->getOperand(3).isKill(); in genFNegatedMAD()
6704 return MAD; in genFNegatedMAD()
|
| H A D | AArch64SchedA510.td | 893 "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
897 "^(ML[AS]|MAD|MSB)_ZPmZZ_D")>;
|
| H A D | AArch64SchedNeoverseV2.td | 2332 (instregex "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
2338 (instregex "^(ML[AS]|MAD|MSB)_ZPmZZ_D")>;
2528 "^FN?(MAD|MSB)_ZPmZZ_[HSD]")>;
|
| H A D | AArch64SchedNeoverseV1.td | 1499 "^(MLA|MLS|MAD|MSB)_ZPmZZ_D$")>;
1503 def : InstRW<[V1Write_4c_1V0], (instregex "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
|
| H A D | AArch64SchedNeoverseN2.td | 1814 "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]$")>;
1818 "^(ML[AS]|MAD|MSB)_ZPmZZ_D$")>;
|
| H A D | AArch64TargetTransformInfo.cpp | 1440 if (auto MAD = instCombineSVEVectorFuseMulAddSub<Intrinsic::aarch64_sve_mul, in instCombineSVEVectorAdd() local
1443 return MAD; in instCombineSVEVectorAdd()
|
| H A D | AArch64SchedA64FX.td | 2086 (instregex "^FABD_Z", "^F(ADD|SUBR?)_.*Z_", "^FN?(MAD|MLA|MLS|MSB)_ZP",
|
| H A D | SVEInstrFormats.td | 3308 //class for generating pseudo for SVE MLA/MAD/MLS/MSB
|
| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | CodeGenOptions.def | 155 CODEGENOPT(LessPreciseFPMAD , 1, 0) ///< Enable less precise MAD instructions to
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | VOP3PInstructions.td | 142 // that FMA and MAD will differ.
|
| /freebsd/contrib/llvm-project/clang/include/clang/Driver/ |
| H A D | Options.td | 1068 HelpText<"OpenCL only. Allow use of less precise MAD computations in the generated binary.">,
|
| /freebsd/crypto/heimdal/lib/wind/ |
| H A D | NormalizationTest.txt | 5856 B9CF;B9CF;1106 1161 11AE;B9CF;1106 1161 11AE; # (맏; 맏; 맏; 맏; 맏; ) HANGUL SYLLABLE MAD
|