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Searched refs:MemIndexedMode (Results 1 – 25 of 33) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1357 SDValue Offset, ISD::MemIndexedMode AM);
1418 SDValue Offset, ISD::MemIndexedMode AM);
1427 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1461 SDValue Offset, ISD::MemIndexedMode AM);
1464 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1475 SDValue Offset, ISD::MemIndexedMode AM);
1526 ISD::MemIndexedMode AM);
1546 ISD::MemIndexedMode AM);
1557 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1560 SDValue Offset, ISD::MemIndexedMode AM);
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H A DSelectionDAGNodes.h1035 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2353 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2366 ISD::MemIndexedMode getAddressingMode() const {
2387 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2415 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2449 ISD::MemIndexedMode AM, EVT MemVT,
2503 ISD::MemIndexedMode getAddressingMode() const {
2554 ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
2657 ISD::MemIndexedMode AM, EVT MemVT,
2676 ISD::MemIndexedMode getAddressingMode() const {
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H A DISDOpcodes.h1455 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enum
H A DBasicTTIImpl.h191 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) { in getISDIndexedMode()
369 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedLoadLegal()
375 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedStoreLegal()
H A DTargetLowering.h3700 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
3711 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h110 ISD::MemIndexedMode &AM,
114 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAVRISelDAGToDAG.cpp133 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedLoad()
H A DAVRISelLowering.cpp1089 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
1146 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h184 ISD::MemIndexedMode &AM,
H A DMSP430ISelDAGToDAG.cpp303 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
H A DMSP430ISelLowering.cpp1335 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h780 ISD::MemIndexedMode &AM, SelectionDAG &DAG) const;
782 ISD::MemIndexedMode &AM,
785 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DRISCVISelDAGToDAG.cpp757 ISD::MemIndexedMode AM = Ld->getAddressingMode(); in tryIndexedLoad()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1577 enum MemIndexedMode { enum
1586 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1589 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
2078 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2079 virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2764 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedLoadLegal()
2767 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedStoreLegal()
H A DTargetTransformInfoImpl.h844 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedLoadLegal()
849 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedStoreLegal()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h503 ISD::MemIndexedMode &AM,
510 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp833 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
869 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
889 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
968 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1088 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1395 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1447 ISD::MemIndexedMode AM; in SelectT2AddrModeImm7Offset()
1591 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryARMIndexedLoad()
1671 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT1IndexedLoad()
1697 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT2IndexedLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1261 ISD::MemIndexedMode &AM,
1264 SDValue &Offset, ISD::MemIndexedMode &AM,
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp1181 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, in isIndexedLoadLegal()
1186 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, in isIndexedStoreLegal()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8588 ISD::MemIndexedMode AM) { in getIndexedLoad()
8721 ISD::MemIndexedMode AM) { in getIndexedStore()
8771 SDValue SelectionDAG::getLoadVP(ISD::MemIndexedMode AM, in getLoadVP()
8851 ISD::MemIndexedMode AM) { in getIndexedLoadVP()
8973 ISD::MemIndexedMode AM) { in getIndexedStoreVP()
9102 ISD::MemIndexedMode AM) { in getIndexedStridedLoadVP()
9122 ISD::MemIndexedMode AM, in getStridedStoreVP()
9225 ISD::MemIndexedMode AM) { in getIndexedStridedStoreVP()
9345 ISD::MemIndexedMode AM, in getMaskedLoad()
9378 ISD::MemIndexedMode AM) { in getIndexedMaskedLoad()
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H A DSelectionDAGDumper.cpp525 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h292 ISD::MemIndexedMode &AM,
H A DHexagonISelDAGToDAG.cpp455 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
564 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1279 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1290 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1331 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1337 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h835 ISD::MemIndexedMode &AM,

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