Searched refs:N19 (Results 1 – 7 of 7) sorted by relevance
/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am642-tqma64xxl.dtsi | 262 /* (N19) OSPI0_DQS */
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H A D | k3-am64-phycore-som.dtsi | 165 AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
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H A D | k3-j7200-common-proc-board.dts | 238 J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
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H A D | k3-am642-sk.dts | 351 AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
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H A D | k3-am642-evm.dts | 415 AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
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/linux/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed-g5.c | 1741 #define N19 216 macro 1750 SIG_EXPR_LIST_ALIAS(N19, VPODE, VPO); 1751 SIG_EXPR_LIST_DECL_SINGLE(N19, NOROE, PNOR, PNOR_DESC); 1752 PIN_DECL_2(N19, GPIOAB0, VPODE, NOROE); 1768 AA22, U22, T20, N18, P19, N19, T21); 1800 N18, P19, N19, T21, T22, R20); 2058 ASPEED_PINCTRL_PIN(N19), 2517 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, N19, R20, SCU8C, 22), 2518 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, N19, R20, SCU8C, 22),
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H A D | pinctrl-aspeed-g4.c | 1811 #define N19 216 macro 1815 SIG_EXPR_LIST_DECL_DUAL(N19, ROMA18, ROM8, ROM16); 1818 SIG_EXPR_LIST_DECL_DUAL(N19, VPOR0, VPO24, VPOOFF1); 1819 PIN_DECL_2(N19, GPIOAB0, ROMA18, VPOR0); 1853 L19, L20, L21, T18, N18, N19, M18, N22, N20); 1857 N18, N19, M18, N22, N20); 1859 M20, M21, M22, L18, L19, L20, L21, T18, N18, N19, M18, N22, 2069 ASPEED_PINCTRL_PIN(N19),
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