Searched refs:mcs_offset (Results 1 – 9 of 9) sorted by relevance
83 tmpval = (rtlphy->mcs_offset[0][6]) + in rtl92d_phy_rf6052_set_cck_txpower()84 (rtlphy->mcs_offset[0][7] << 8); in rtl92d_phy_rf6052_set_cck_txpower()86 tmpval = (rtlphy->mcs_offset[0][14]) + in rtl92d_phy_rf6052_set_cck_txpower()87 (rtlphy->mcs_offset[0][15] << 24); in rtl92d_phy_rf6052_set_cck_txpower()168 u32 mcs_offset; in _rtl92d_get_pwr_diff_limit() local172 mcs_offset = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)]; in _rtl92d_get_pwr_diff_limit()175 pwr_diff_limit[i] = (mcs_offset >> (i * 8)) & 0x7f; in _rtl92d_get_pwr_diff_limit()202 writeval = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)]; in _rtl92d_get_txpower_writeval_by_regulatory()220 writeval = rtlphy->mcs_offset in _rtl92d_get_txpower_writeval_by_regulatory()261 writeval = rtlphy->mcs_offset[0][index + (rf ? 8 : 0)]; in _rtl92d_get_txpower_writeval_by_regulatory()
305 rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data; in rtl92d_store_pwrindex_diffrate_offset()309 rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index]); in rtl92d_store_pwrindex_diffrate_offset()
73 tmpval = (rtlphy->mcs_offset[0][6]) + in rtl92ce_phy_rf6052_set_cck_txpower()74 (rtlphy->mcs_offset[0][7] << 8); in rtl92ce_phy_rf6052_set_cck_txpower()77 tmpval = (rtlphy->mcs_offset[0][14]) + in rtl92ce_phy_rf6052_set_cck_txpower()78 (rtlphy->mcs_offset[0][15] << 24); in rtl92ce_phy_rf6052_set_cck_txpower()182 writeval = rtlphy->mcs_offset[chnlgroup][index + in _rtl92c_get_txpower_writeval_by_regulatory()212 writeval = rtlphy->mcs_offset[chnlgroup] in _rtl92c_get_txpower_writeval_by_regulatory()247 pwr_diff_limit[i] = (u8) ((rtlphy->mcs_offset in _rtl92c_get_txpower_writeval_by_regulatory()287 writeval = rtlphy->mcs_offset[chnlgroup] in _rtl92c_get_txpower_writeval_by_regulatory()
76 tmpval = (rtlphy->mcs_offset[0][6]) + in rtl92cu_phy_rf6052_set_cck_txpower()77 (rtlphy->mcs_offset[0][7] << 8); in rtl92cu_phy_rf6052_set_cck_txpower()79 tmpval = (rtlphy->mcs_offset[0][14]) + in rtl92cu_phy_rf6052_set_cck_txpower()80 (rtlphy->mcs_offset[0][15] << 24); in rtl92cu_phy_rf6052_set_cck_txpower()172 writeval = rtlphy->mcs_offset in _rtl92c_get_txpower_writeval_by_regulatory()195 writeval = rtlphy->mcs_offset[chnlgroup][index + in _rtl92c_get_txpower_writeval_by_regulatory()227 pwr_diff_limit[i] = (u8) ((rtlphy->mcs_offset in _rtl92c_get_txpower_writeval_by_regulatory()261 writeval = rtlphy->mcs_offset[chnlgroup] in _rtl92c_get_txpower_writeval_by_regulatory()
169 writeval = rtlphy->mcs_offset[chnlgroup][index] + in _rtl92s_get_txpower_writeval_byregulatory()198 writeval = rtlphy->mcs_offset[chnlgroup][index] in _rtl92s_get_txpower_writeval_byregulatory()231 pwrdiff_limit[i] = (u8)((rtlphy->mcs_offset in _rtl92s_get_txpower_writeval_byregulatory()269 writeval = rtlphy->mcs_offset[chnlgroup][index] + in _rtl92s_get_txpower_writeval_byregulatory()
658 rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data; in _rtl92s_store_pwrindex_diffrate_offset()
266 u8 mcs_offset);
1233 const unsigned int mcs_offset = ARRAY_SIZE(rsi_rates); in rsi_mac80211_set_rate_mask() local1244 bm = mask->control[i].legacy | (mask->control[i].ht_mcs[0] << mcs_offset); in rsi_mac80211_set_rate_mask()1248 if (rate_index < mcs_offset) in rsi_mac80211_set_rate_mask()1251 cfg->fixed_hw_rate = rsi_mcsrates[rate_index - mcs_offset]; in rsi_mac80211_set_rate_mask()
1328 u32 mcs_offset[MAX_PG_GROUP][16]; member