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Searched refs:Op0 (Results 1 – 25 of 72) sorted by relevance

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/minix/external/bsd/llvm/dist/llvm/lib/Analysis/
H A DInstructionSimplify.cpp208 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
250 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
547 return Op0; in SimplifyAddInst()
682 return Op0; in SimplifySubInst()
690 return Op0; in SimplifySubInst()
716 X = Op0; in SimplifySubInst()
738 Z = Op0; in SimplifySubInst()
888 return Op0; in SimplifyFMulInst()
1577 (A == Op0 || B == Op0)) in SimplifyAndInst()
1734 (A == Op0 || B == Op0)) in SimplifyOrInst()
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/minix/external/bsd/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp264 if (isa<PHINode>(Op0)) in visitMul()
301 Op1C = Op0; in visitMul()
530 if (isa<Constant>(Op0)) in visitFMul()
531 std::swap(Op0, Op1); in visitFMul()
546 if (isa<PHINode>(Op0)) in visitFMul()
622 OpX = Op0; in visitFMul()
638 Value *Opnd0 = Op0; in visitFMul()
954 Op0, ConstantInt::get(Op0->getType(), C.logBase2())); in foldUDivPow2Cst()
1212 if (isa<Constant>(Op0)) in visitFDiv()
1295 if (Op0->hasOneUse() && match(Op0, m_FDiv(m_Value(X), m_Value(Y)))) { in visitFDiv()
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H A DInstCombineAndOrXor.cpp1380 tmpOp1 = Op0; in visitAnd()
1417 if (Op0->hasOneUse() || cast<BinaryOperator>(Op0)->hasOneUse()) in visitAnd()
2189 Or->takeName(Op0); in visitOr()
2198 Or->takeName(Op0); in visitOr()
2231 NOr->takeName(Op0); in visitOr()
2240 NOr->takeName(Op0); in visitOr()
2371 if (Op0->hasOneUse() || cast<BinaryOperator>(Op0)->hasOneUse()) in visitOr()
2390 std::swap(Op0, Op1); in visitOr()
2398 if (Op0 == A || Op0 == B) in visitOr()
2419 if ((Op0 == B->getOperand(0) || Op0 == B->getOperand(1)) && in visitOr()
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H A DInstCombineCompares.cpp2588 std::swap(Op0, Op1); in visitICmpInst()
2613 Type *Ty = Op0->getType(); in visitICmpInst()
2691 if (Op0->hasOneUse()) { in visitICmpInst()
2823 LHS = Op0; in visitICmpInst()
2868 LHS = Op0; in visitICmpInst()
3152 if (isa<CastInst>(Op0)) { in visitICmpInst()
3199 if ((C == Op0 || D == Op0) && NoOp1WrapProblem) in visitICmpInst()
3454 (Op0 == A || Op0 == B)) in visitICmpInst()
3498 (A == Op0 || B == Op0)) { in visitICmpInst()
3566 if (Op0->hasOneUse() && in visitICmpInst()
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H A DInstCombineShifts.cpp26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
33 if (isa<Constant>(Op0)) in commonShiftTransforms()
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
359 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in FoldShiftByConstant()
362 if (isa<PHINode>(Op0)) in FoldShiftByConstant()
367 if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) { in FoldShiftByConstant()
410 if (Op0->hasOneUse()) { in FoldShiftByConstant()
745 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitLShr() local
789 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAShr() local
821 if (MaskedValueIsZero(Op0, in visitAShr()
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H A DInstCombineAddSub.cpp1535 return BinaryOperator::CreateXor(Op0, Op1); in visitSub()
1538 if (match(Op0, m_AllOnes())) in visitSub()
1541 if (Constant *C = dyn_cast<Constant>(Op0)) { in visitSub()
1571 if (ConstantInt *C = dyn_cast<ConstantInt>(Op0)) { in visitSub()
1611 if (Op0->hasOneUse()) { in visitSub()
1615 match(Op0, m_Or(m_Specific(Op1), m_Value(Y)))) in visitSub()
1627 return BinaryOperator::CreateAdd(Op0, in visitSub()
1634 return BinaryOperator::CreateAnd(Op0, in visitSub()
1659 return BinaryOperator::CreateAdd(Op0, NewMul); in visitSub()
1667 if (match(Op0, m_PtrToInt(m_Value(LHSOp))) && in visitSub()
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H A DInstructionCombining.cpp224 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
225 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
226 Value *B = Op0->getOperand(1); in SimplifyAssociativeOrCommutative()
237 (!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) { in SimplifyAssociativeOrCommutative()
275 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
276 Value *A = Op0->getOperand(0); in SimplifyAssociativeOrCommutative()
316 if (Op0 && Op1 && in SimplifyAssociativeOrCommutative()
590 if (Op0 && RightDistributesOverLeft(Op0->getOpcode(), TopLevelOpcode)) { in SimplifyUsingDistributiveLaws()
593 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in SimplifyUsingDistributiveLaws()
604 return Op0; in SimplifyUsingDistributiveLaws()
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/minix/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/
H A DFastISel.h360 unsigned Op0, bool Op0IsKill, unsigned Op1,
368 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
389 const TargetRegisterClass *RC, unsigned Op0,
395 const TargetRegisterClass *RC, unsigned Op0,
401 const TargetRegisterClass *RC, unsigned Op0,
408 const TargetRegisterClass *RC, unsigned Op0,
414 const TargetRegisterClass *RC, unsigned Op0,
420 const TargetRegisterClass *RC, unsigned Op0,
426 const TargetRegisterClass *RC, unsigned Op0,
433 const TargetRegisterClass *RC, unsigned Op0,
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/minix/external/bsd/llvm/dist/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp381 Scatterer Op0 = scatter(&I, I.getOperand(0)); in splitBinary() local
388 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem], in splitBinary()
409 Scatterer Op0 = scatter(&SI, SI.getOperand(0)); in visitSelectInst() local
415 Value *Op0 = SI.getOperand(0); in visitSelectInst() local
476 Scatterer Op0 = scatter(&CI, CI.getOperand(0)); in visitCastInst() local
496 Scatterer Op0 = scatter(&BCI, BCI.getOperand(0)); in visitBitCastInst() local
511 Value *V = Op0[Op0I]; in visitBitCastInst()
548 Scatterer Op0 = scatter(&SVI, SVI.getOperand(0)); in visitShuffleVectorInst() local
557 else if (unsigned(Selector) < Op0.size()) in visitShuffleVectorInst()
558 Res[I] = Op0[Selector]; in visitShuffleVectorInst()
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H A DCorrelatedValuePropagation.cpp165 Value *Op0 = C->getOperand(0); in processCmp() local
166 if (isa<Instruction>(Op0) && in processCmp()
167 cast<Instruction>(Op0)->getParent() == C->getParent()) in processCmp()
/minix/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1434 const Value *Op0 = EVI->getOperand(0); in selectExtractValue() local
1435 Type *AggTy = Op0->getType(); in selectExtractValue()
1442 else if (isa<Instruction>(Op0)) in selectExtractValue()
1714 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_r()
1736 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rr()
1761 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rrr()
1787 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_ri()
1810 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rii()
1834 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rf()
1857 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rri()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp399 SDValue Op0, uint64_t Op1) { in expandDisp() argument
403 changeComponent(AM, IsBase, Op0); in expandDisp()
422 SDValue Op0 = N.getOperand(0); in expandAddress() local
425 unsigned Op0Code = Op0->getOpcode(); in expandAddress()
431 return expandAdjDynAlloc(AM, IsBase, Op0); in expandAddress()
437 return expandDisp(AM, IsBase, Op0, in expandAddress()
440 if (IsBase && expandIndex(AM, Op0, Op1)) in expandAddress()
936 SDValue Op0 = N->getOperand(I ^ 1); in tryRxSBG() local
951 convertTo(SDLoc(N), MVT::i64, Op0), in tryRxSBG()
967 if (Op0.getNode()) in splitLargeImmediate()
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H A DSystemZISelLowering.cpp47 SDValue Op0, Op1; member
1251 if (isNaturalMemoryOperand(C.Op0, C.ICmpType) && C.Op0.hasOneUse()) { in shouldSwapCmpOperands()
1299 for (auto I = C.Op0->use_begin(), E = C.Op0->use_end(); I != E; ++I) { in adjustForSubtraction()
1319 for (auto I = C.Op0->use_begin(), E = C.Op0->use_end(); I != E; ++I) { in adjustForFNeg()
1372 C.Op0 = C.Op0.getOperand(0); in adjustICmpTruncate()
1504 NewC.Op0 = C.Op0.getOperand(0); in adjustForTestUnderMask()
1544 NewC.Op0 = NewC.Op0.getOperand(0); in adjustForTestUnderMask()
1553 NewC.Op0 = NewC.Op0.getOperand(0); in adjustForTestUnderMask()
1564 C.Op0 = NewC.Op0; in adjustForTestUnderMask()
1635 Op0 = DAG.getNode(Extend, DL, MVT::i64, Op0); in lowerMUL_LOHI32()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp201 SDValue Op0, Op1; in SelectInlineAsmMemoryOperand() local
205 if (!SelectADDRrr(Op, Op0, Op1)) in SelectInlineAsmMemoryOperand()
206 SelectADDRri(Op, Op0, Op1); in SelectInlineAsmMemoryOperand()
210 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1166 TOS = Op0; in handleTwoArgFP()
1176 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1177 Op0 = TOS = Dest; in handleTwoArgFP()
1184 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1185 Op0 = TOS = Dest; in handleTwoArgFP()
1197 bool isForward = TOS == Op0; in handleTwoArgFP()
1216 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; in handleTwoArgFP()
1224 if (KillsOp0 && KillsOp1 && Op0 != Op1) { in handleTwoArgFP()
1255 moveToTop(Op0, I); in handleCompareFP()
1279 moveToTop(Op0, I); in handleCondMovFP()
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/minix/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/
H A DExecutionEngine.cpp556 Constant *Op0 = CE->getOperand(0); in getConstantValue() local
569 GenericValue GV = getConstantValue(Op0); in getConstantValue()
575 GenericValue GV = getConstantValue(Op0); in getConstantValue()
581 GenericValue GV = getConstantValue(Op0); in getConstantValue()
588 GenericValue GV = getConstantValue(Op0); in getConstantValue()
594 GenericValue GV = getConstantValue(Op0); in getConstantValue()
599 GenericValue GV = getConstantValue(Op0); in getConstantValue()
614 GenericValue GV = getConstantValue(Op0); in getConstantValue()
632 if (Op0->getType()->isFloatTy()) in getConstantValue()
634 else if (Op0->getType()->isDoubleTy()) in getConstantValue()
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/minix/external/bsd/llvm/dist/llvm/include/llvm/IR/
H A DGetElementPtrTypeIterator.h102 gep_type_begin(Type *Op0, ArrayRef<T> A) { in gep_type_begin() argument
103 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin()); in gep_type_begin()
H A DPatternMatch.h1185 inline typename m_Intrinsic_Ty<T0>::Ty m_Intrinsic(const T0 &Op0) {
1186 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
1190 inline typename m_Intrinsic_Ty<T0, T1>::Ty m_Intrinsic(const T0 &Op0,
1192 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
1197 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) {
1198 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
1204 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) {
1210 inline typename m_Intrinsic_Ty<Opnd0>::Ty m_BSwap(const Opnd0 &Op0) {
1211 return m_Intrinsic<Intrinsic::bswap>(Op0);
1217 return m_Intrinsic<Intrinsic::minnum>(Op0, Op1);
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/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMFastISel.cpp296 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_r()
319 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_rr()
325 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_rr()
348 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_rrr()
355 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_rrr()
379 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_ri()
383 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_ri()
406 Op0 = constrainOperandRegClass(II, Op0, 1); in fastEmitInst_rri()
411 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_rri()
1179 Value *Op0 = I->getOperand(0); in SelectStore() local
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H A DARMLoadStoreOptimizer.cpp1930 size_t numMemRefs = (Op0->memoperands_end() - Op0->memoperands_begin()) in concatenateMemOperands()
1936 std::copy(Op0->memoperands_begin(), Op0->memoperands_end(), MemBegin); in concatenateMemOperands()
1956 unsigned Opcode = Op0->getOpcode(); in CanFormLdStDWord()
1976 if (!Op0->hasOneMemOperand() || in CanFormLdStDWord()
1989 int OffImm = getMemoryOpOffset(Op0); in CanFormLdStDWord()
2006 EvenReg = Op0->getOperand(0).getReg(); in CanFormLdStDWord()
2010 BaseReg = Op0->getOperand(1).getReg(); in CanFormLdStDWord()
2011 Pred = getInstrPredicate(Op0, PredReg); in CanFormLdStDWord()
2012 dl = Op0->getDebugLoc(); in CanFormLdStDWord()
2102 MachineInstr *Op0 = Ops.back(); in RescheduleOps() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp554 SDValue Op0 = N->getOperand(0); in performANDCombine() local
581 SDValue Ops[] = { Op0->getOperand(0), Op0->getOperand(1), Op0Op2 }; in performANDCombine()
674 SDValue Op0 = N->getOperand(0); in performORCombine() local
900 SDValue Op0 = N->getOperand(0); in performSRACombine() local
907 if (Op0->getOpcode() == ISD::SHL && Op1 == Op0->getOperand(1)) { in performSRACombine()
998 SDValue Op0 = N->getOperand(0); in performVSELECTCombine() local
1046 SDValue Op0 = N->getOperand(0); in performXORCombine() local
1053 NotOp = Op0; in performXORCombine()
2275 SDValue Op0 = Op->getOperand(0); in lowerEXTRACT_VECTOR_ELT() local
2649 SDValue Op0; in lowerVECTOR_SHUFFLE_VSHF() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2025 const Value *Op0 = I->getOperand(0); in selectStore() local
2047 SrcReg = getRegForValue(Op0); in selectStore()
3983 Op0 = TmpReg; in emitLSL_ri()
4081 Op0 = emitIntExt(SrcVT, Op0, RetVT, IsZExt); in emitLSR_ri()
4082 if (!Op0) in emitLSR_ri()
4104 Op0 = TmpReg; in emitLSR_ri()
4213 Op0 = TmpReg; in emitASR_ri()
4567 const Value *Op0 = I->getOperand(0); in selectShift() local
4574 Op0 = ZExt->getOperand(0); in selectShift()
4583 Op0 = SExt->getOperand(0); in selectShift()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp803 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in fromString() local
805 Ops[1].getAsInteger(10, Op0); in fromString()
810 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in fromString()
843 uint32_t Op0 = (Bits >> 14) & 0x3; in toString() local
849 return "s" + utostr(Op0)+ "_" + utostr(Op1) + "_c" + utostr(CRn) in toString()
/minix/external/bsd/llvm/dist/llvm/include/llvm/Analysis/
H A DInstructionSimplify.h158 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
167 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
176 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
/minix/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp2020 GenericValue Op0 = getOperandValue(CE->getOperand(0), SF); in getConstantExprValue() local
2025 case Instruction::Add: Dest.IntVal = Op0.IntVal + Op1.IntVal; break; in getConstantExprValue()
2026 case Instruction::Sub: Dest.IntVal = Op0.IntVal - Op1.IntVal; break; in getConstantExprValue()
2028 case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break; in getConstantExprValue()
2029 case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break; in getConstantExprValue()
2030 case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break; in getConstantExprValue()
2031 case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break; in getConstantExprValue()
2032 case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break; in getConstantExprValue()
2041 Dest.IntVal = Op0.IntVal.shl(Op1.IntVal.getZExtValue()); in getConstantExprValue()
2044 Dest.IntVal = Op0.IntVal.lshr(Op1.IntVal.getZExtValue()); in getConstantExprValue()
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