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Searched refs:Pred1 (Results 1 – 16 of 16) sorted by relevance

/minix/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/
H A DBasicBlockUtils.cpp771 BasicBlock *Pred1 = nullptr; in GetIfCondition() local
777 Pred1 = SomePHI->getIncomingBlock(0); in GetIfCondition()
783 Pred1 = *PI++; in GetIfCondition()
793 BranchInst *Pred1Br = dyn_cast<BranchInst>(Pred1->getTerminator()); in GetIfCondition()
808 std::swap(Pred1, Pred2); in GetIfCondition()
823 IfTrue = Pred1; in GetIfCondition()
828 IfFalse = Pred1; in GetIfCondition()
841 BasicBlock *CommonPred = Pred1->getSinglePredecessor(); in GetIfCondition()
850 if (BI->getSuccessor(0) == Pred1) { in GetIfCondition()
851 IfTrue = Pred1; in GetIfCondition()
[all …]
H A DSimplifyCFG.cpp1238 BasicBlock *Pred1 = *PI++; in SinkThenElseCodeToEnd() local
1241 BasicBlock *BB2 = (Pred0 == BB1) ? Pred1 : Pred0; in SinkThenElseCodeToEnd()
/minix/external/bsd/llvm/dist/llvm/lib/Transforms/Scalar/
H A DMergedLoadStoreMotion.cpp532 BasicBlock *Pred1 = *PI; in mergeStores() local
535 if (Pred0 == Pred1) in mergeStores()
541 int Size1 = Pred1->size(); in mergeStores()
560 if (StoreInst *S1 = canSinkFromBlock(Pred1, S0)) { in mergeStores()
/minix/external/bsd/llvm/dist/llvm/lib/Target/R600/
H A DAMDGPUInstrInfo.h127 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
H A DR600InstrInfo.h191 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
H A DAMDGPUInstrInfo.cpp244 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
H A DR600InstrInfo.cpp1007 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/minix/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h216 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
H A DPPCInstrInfo.cpp1207 const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
1209 assert(Pred1.size() == 2 && "Invalid PPC first predicate"); in SubsumesPredicate()
1212 if (Pred1[1].getReg() == PPC::CTR8 || Pred1[1].getReg() == PPC::CTR) in SubsumesPredicate()
1218 if (Pred1[1].getReg() != Pred2[1].getReg()) in SubsumesPredicate()
1221 PPC::Predicate P1 = (PPC::Predicate) Pred1[0].getImm(); in SubsumesPredicate()
/minix/external/bsd/llvm/dist/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1484 ICmpInst::Predicate Pred0, Pred1; in SimplifyAndOfICmps() local
1495 if (!match(Op1, m_ICmp(Pred1, m_Specific(V), m_Specific(CI1)))) in SimplifyAndOfICmps()
1509 if (Pred0 == ICmpInst::ICMP_ULT && Pred1 == ICmpInst::ICMP_SGT) in SimplifyAndOfICmps()
1515 if (Pred0 == ICmpInst::ICMP_ULE && Pred1 == ICmpInst::ICMP_SGT) in SimplifyAndOfICmps()
1523 if (Pred0 == ICmpInst::ICMP_ULT && Pred1 == ICmpInst::ICMP_UGT) in SimplifyAndOfICmps()
1526 if (Pred0 == ICmpInst::ICMP_ULE && Pred1 == ICmpInst::ICMP_UGT) in SimplifyAndOfICmps()
1641 ICmpInst::Predicate Pred0, Pred1; in SimplifyOrOfICmps() local
1652 if (!match(Op1, m_ICmp(Pred1, m_Specific(V), m_Specific(CI1)))) in SimplifyOrOfICmps()
1666 if (Pred0 == ICmpInst::ICMP_UGE && Pred1 == ICmpInst::ICMP_SLE) in SimplifyOrOfICmps()
1672 if (Pred0 == ICmpInst::ICMP_UGT && Pred1 == ICmpInst::ICMP_SLE) in SimplifyOrOfICmps()
[all …]
/minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h142 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
H A DHexagonInstrInfo.cpp1044 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h138 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
H A DARMBaseInstrInfo.cpp480 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
482 if (Pred1.size() > 2 || Pred2.size() > 2) in SubsumesPredicate()
485 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate()
/minix/external/bsd/llvm/dist/llvm/include/llvm/Target/
H A DTargetInstrInfo.h902 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/minix/external/bsd/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp863 ICmpInst::Predicate Pred1 = (Inverted ? Cmp1->getInversePredicate() : in simplifyRangeCheck() local
874 Pred1 = ICmpInst::getSwappedPredicate(Pred1); in simplifyRangeCheck()
881 switch (Pred1) { in simplifyRangeCheck()