/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 324 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 327 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 338 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 341 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 357 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost() 360 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost() 371 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f64, 2 }, in getCastInstrCost() 374 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f64, 2 }, in getCastInstrCost()
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H A D | AArch64ISelLowering.cpp | 1695 case MVT::v2i8: in getExtensionTo64Bits()
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/minix/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | MachineValueType.h | 67 v2i8 = 20, // 2 x i8 enumerator 200 return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 || in is16BitVector() 286 case v2i8 : in getVectorElementType() 355 case v2i8: in getVectorNumElements() 395 case v2i8: in getSizeInBits() 530 if (NumElements == 2) return MVT::v2i8; in getVectorVT()
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H A D | ValueTypes.td | 43 def v2i8 : ValueType<16 , 20>; // 2 x i8 vector value
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/minix/external/bsd/llvm/dist/llvm/test/CodeGen/ARM/ |
H A D | 2012-08-23-legalize-vmull.ll | 26 ; v2i8 70 ; v2i8 120 ; v2i8 121 ; v2i8 x v2i16
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/minix/external/bsd/llvm/dist/llvm/include/llvm/IR/ |
H A D | IntrinsicsNVVM.td | 1871 "llvm.nvvm.suld.1d.v2i8.clamp">; 1961 "llvm.nvvm.suld.2d.v2i8.clamp">; 2051 "llvm.nvvm.suld.3d.v2i8.clamp">; 2097 "llvm.nvvm.suld.1d.v2i8.trap">; 2187 "llvm.nvvm.suld.2d.v2i8.trap">; 2277 "llvm.nvvm.suld.3d.v2i8.trap">; 2323 "llvm.nvvm.suld.1d.v2i8.zero">; 2413 "llvm.nvvm.suld.2d.v2i8.zero">; 2503 "llvm.nvvm.suld.3d.v2i8.zero">; 2901 "llvm.nvvm.sust.b.1d.v2i8.trap">, [all …]
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H A D | Intrinsics.td | 157 def llvm_v2i8_ty : LLVMType<v2i8>; // 2 x i8
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/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 243 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 244 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost() 275 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 276 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
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H A D | ARMInstrNEON.td | 6557 // v2i8 -> v2i16 -> v2i32 6569 // v2i8 -> v2i16 -> v2i32 6575 // Triple lengthening - v2i8 -> v2i16 -> v2i32 -> v2i64
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H A D | ARMISelLowering.cpp | 570 MVT Tys[6] = {MVT::v8i8, MVT::v4i8, MVT::v2i8, in ARMTargetLowering() 5901 case MVT::v2i8: in getExtensionTo64Bits()
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/minix/external/bsd/llvm/dist/llvm/lib/IR/ |
H A D | ValueTypes.cpp | 138 case MVT::v2i8: return "v2i8"; in getEVTString() 206 case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2); in getTypeForEVT()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXVector.td | 41 // Extract v2i8 46 (v2i8 V2I8Regs:$src), imm:$c))], 107 // Insert v2i8 799 def : Pat<(v2i8 (vec_shuf:$op V2I8Regs:$src1, V2I8Regs:$src2)), 890 def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 0)), 893 def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 2)), 1265 // v2i8 -> i16 1289 // i16 -> v2i8
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H A D | NVPTXISelLowering.cpp | 63 case MVT::v2i8: in IsPTXVectorType() 1867 case MVT::v2i8: in LowerSTOREVector() 3988 if (MemVT != MVT::v2i8 && MemVT != MVT::v4i8) { in PerformANDCombine() 4226 case MVT::v2i8: in ReplaceLoadVector()
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/minix/external/bsd/llvm/dist/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 79 case MVT::v2i8: return "MVT::v2i8"; in getEnumName()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 164 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); in AMDGPUTargetLowering() 219 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering() 220 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering() 221 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
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H A D | SIISelLowering.cpp | 113 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Custom); in SITargetLowering()
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H A D | R600ISelLowering.cpp | 103 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Expand); in R600TargetLowering()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 592 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Custom); in PPCTargetLowering()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1030 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Custom); in resetOperationActions() 1135 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom); in resetOperationActions()
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