| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 70 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in BPFTargetLowering()
125 setOperationAction(ISD::BR_CC, MVT::i32, in BPFTargetLowering()
283 case ISD::BR_CC: in LowerOperation()
602 return DAG.getNode(BPFISD::BR_CC, DL, Op.getValueType(), Chain, LHS, RHS, in LowerBR_CC()
634 case BPFISD::BR_CC: in getTargetNodeName()
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| H A D | BPFISelLowering.h | 29 BR_CC, enumerator
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| H A D | BPFInstrInfo.td | 44 def BPFbrcc : SDNode<"BPFISD::BR_CC", SDT_BPFBrCC,
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.h | 50 BR_CC, enumerator
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| H A D | LanaiISelLowering.cpp | 85 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in LanaiTargetLowering()
180 case ISD::BR_CC: in LowerOperation()
879 return DAG.getNode(LanaiISD::BR_CC, DL, Op.getValueType(), Chain, Dest, in LowerBR_CC()
1110 case LanaiISD::BR_CC: in getTargetNodeName()
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| H A D | LanaiInstrInfo.td | 52 def LanaiBrCC : SDNode<"LanaiISD::BR_CC", SDT_LanaiBrCC,
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 60 BR_CC, enumerator
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| H A D | MSP430ISelLowering.cpp | 89 setOperationAction(ISD::BR_CC, MVT::i8, Custom); in MSP430TargetLowering()
90 setOperationAction(ISD::BR_CC, MVT::i16, Custom); in MSP430TargetLowering()
348 case ISD::BR_CC: return LowerBR_CC(Op, DAG); in LowerOperation()
1137 return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(), in LowerBR_CC()
1378 case MSP430ISD::BR_CC: return "MSP430ISD::BR_CC"; in getTargetNodeName()
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| H A D | MSP430InstrInfo.td | 63 def MSP430brcc : SDNode<"MSP430ISD::BR_CC", SDT_MSP430BrCC,
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 953 BR_CC, enumerator
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 97 setOperationAction(ISD::BR_CC, MVT::i8, Custom); in AVRTargetLowering()
98 setOperationAction(ISD::BR_CC, MVT::i16, Custom); in AVRTargetLowering()
99 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in AVRTargetLowering()
100 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in AVRTargetLowering()
800 case ISD::BR_CC: in LowerOperation()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 116 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in ARCTargetLowering()
756 case ISD::BR_CC: in LowerOperation()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1037 case ISD::BR_CC: { in LegalizeOp()
1042 unsigned CompareOperand = Node->getOpcode() == ISD::BR_CC ? 2 : in LegalizeOp()
3550 Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, in ExpandNode()
3564 Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1, in ExpandNode()
3705 case ISD::BR_CC: { in ExpandNode()
3724 Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, in ExpandNode()
3729 Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, Tmp4, in ExpandNode()
4387 if (Node->getOpcode() == ISD::BR_CC || in PromoteNode()
4658 case ISD::BR_CC: { in PromoteNode()
4667 Results.push_back(DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), in PromoteNode()
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| H A D | SelectionDAGDumper.cpp | 376 case ISD::BR_CC: return "br_cc"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 814 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break; in SoftenFloatOperand()
1767 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break; in ExpandFloatOperand()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 39 BR_CC, enumerator
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| H A D | RISCVISelLowering.cpp | 173 setOperationAction(ISD::BR_CC, XLenVT, Expand); in RISCVTargetLowering()
317 setOperationAction(ISD::BR_CC, MVT::f16, Expand); in RISCVTargetLowering()
329 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in RISCVTargetLowering()
346 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in RISCVTargetLowering()
2729 return DAG.getNode(RISCVISD::BR_CC, DL, Op.getValueType(), Op.getOperand(0), in lowerBRCOND()
2733 return DAG.getNode(RISCVISD::BR_CC, DL, Op.getValueType(), Op.getOperand(0), in lowerBRCOND()
5795 case RISCVISD::BR_CC: { in PerformDAGCombine()
5819 return DAG.getNode(RISCVISD::BR_CC, DL, N->getValueType(0), in PerformDAGCombine()
5827 return DAG.getNode(RISCVISD::BR_CC, SDLoc(N), N->getValueType(0), in PerformDAGCombine()
5840 return DAG.getNode(RISCVISD::BR_CC, DL, N->getValueType(0), in PerformDAGCombine()
[all …]
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1547 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in SparcTargetLowering()
1548 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in SparcTargetLowering()
1549 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in SparcTargetLowering()
1550 setOperationAction(ISD::BR_CC, MVT::f128, Custom); in SparcTargetLowering()
1571 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in SparcTargetLowering()
3034 case ISD::BR_CC: return LowerBR_CC(Op, DAG, *this, in LowerOperation()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1613 setOperationAction(ISD::BR_CC, VT, Expand); in HexagonTargetLowering()
1617 setOperationAction(ISD::BR_CC, VT, Expand); in HexagonTargetLowering()
1620 setOperationAction(ISD::BR_CC, MVT::Other, Expand); in HexagonTargetLowering()
1644 ISD::BR_CC, ISD::SELECT_CC, ISD::ConstantPool, in HexagonTargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 122 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in R600TargetLowering()
123 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in R600TargetLowering()
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| H A D | SIISelLowering.cpp | 222 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in SITargetLowering()
223 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in SITargetLowering()
224 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in SITargetLowering()
225 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in SITargetLowering()
226 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in SITargetLowering()
523 setOperationAction(ISD::BR_CC, MVT::i16, Expand); in SITargetLowering()
561 setOperationAction(ISD::BR_CC, MVT::f16, Expand); in SITargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 400 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in MipsTargetLowering()
401 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in MipsTargetLowering()
402 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in MipsTargetLowering()
403 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in MipsTargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 382 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in AArch64TargetLowering()
383 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in AArch64TargetLowering()
384 setOperationAction(ISD::BR_CC, MVT::f16, Custom); in AArch64TargetLowering()
385 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in AArch64TargetLowering()
386 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in AArch64TargetLowering()
436 setOperationAction(ISD::BR_CC, MVT::f128, Custom); in AArch64TargetLowering()
611 setOperationAction(ISD::BR_CC, MVT::f16, Promote); in AArch64TargetLowering()
648 setOperationAction(ISD::BR_CC, MVT::v4f16, Expand); in AArch64TargetLowering()
676 setOperationAction(ISD::BR_CC, MVT::v8f16, Expand); in AArch64TargetLowering()
978 setOperationAction(ISD::BR_CC, MVT::v1f64, Expand); in AArch64TargetLowering()
[all …]
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 253 for (auto Op : {ISD::BR_CC, ISD::SELECT_CC}) in WebAssemblyTargetLowering()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 91 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in XCoreTargetLowering()
|