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Searched refs:CPU_CONTROL_DC_ENABLE (Results 1 – 19 of 19) sorted by relevance

/netbsd/sys/arch/arm/arm/
H A Dcpufunc.c2662 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in arm9_setup()
2818 | CPU_CONTROL_DC_ENABLE in arm11mpcore_setup()
2878 cpuctrl |= CPU_CONTROL_DC_ENABLE; in pj4bv7_setup()
2950 CPU_CONTROL_DC_ENABLE | in armv7_setup()
3069 CPU_CONTROL_DC_ENABLE | in arm11x6_setup()
3188 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in sa110_setup()
3193 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in sa110_setup()
3255 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in sa11x0_setup()
3260 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in sa11x0_setup()
3309 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE in fa526_setup()
[all …]
H A Darmv6_start.S667 tst r0, #CPU_CONTROL_DC_ENABLE
674 CPU_CONTROL_DC_ENABLE | \
994 ldr r2, =(CPU_CONTROL_IC_ENABLE|CPU_CONTROL_DC_ENABLE)
/netbsd/sys/arch/evbarm/gemini/
H A Dgemini_start.S316 CPU_CONTROL_DC_ENABLE | \
323 CPU_CONTROL_DC_ENABLE | \
338 .word ~(CPU_CONTROL_IC_ENABLE|CPU_CONTROL_DC_ENABLE)
/netbsd/sys/arch/evbarm/armadaxp/
H A Darmadaxp_start.S73 movw r1, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\
120 | CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
/netbsd/sys/arch/hpcarm/hpcarm/
H A Dkloader_pxa2x0.S56 bic r2, r2, #CPU_CONTROL_DC_ENABLE
/netbsd/sys/arch/zaurus/zaurus/
H A Dkloader_zaurus.S69 bic r2, r2, #CPU_CONTROL_DC_ENABLE
/netbsd/sys/arch/evbarm/stand/board/
H A Ds3c2410_vector.S73 ldr r0, =(CPU_CONTROL_MMU_ENABLE|CPU_CONTROL_DC_ENABLE|CPU_CONTROL_IC_ENABLE)
H A Ds3c2800_vector.S105 ldr r0, =(CPU_CONTROL_MMU_ENABLE|CPU_CONTROL_DC_ENABLE|CPU_CONTROL_IC_ENABLE)
/netbsd/sys/arch/evbarm/ixm1200/
H A Dixm1200_start.S65 orr r0, r0, #CPU_CONTROL_DC_ENABLE
/netbsd/sys/arch/evbarm/gumstix/
H A Dgumstix_start.S106 bic ip, ip, #CPU_CONTROL_DC_ENABLE
/netbsd/sys/arch/evbarm/imx23_olinuxino/
H A Dimx23_olinuxino_start.S132 ldr r1, =(CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE \
/netbsd/sys/arch/arm/arm32/
H A Dlocore.S185 bic r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
H A Dgenassym.cf161 #define CPU_CONTROL_DC_ENABLE CPU_CONTROL_DC_ENABLE
H A Dcpu.c726 if ((ci->ci_ctrl & CPU_CONTROL_DC_ENABLE) == 0) in identify_arm_cpu()
/netbsd/sys/arch/evbarm/marvell/
H A Dmarvell_start.S244 biceq r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE)
/netbsd/sys/arch/acorn32/stand/boot32/
H A Dstart.S152 orr r0, r0, #CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_MMU_ENABLE
/netbsd/sys/arch/arm/include/
H A Darmreg.h188 #define CPU_CONTROL_DC_ENABLE 0x00000004 /* C: IDC/DC enable */ macro
216 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE
/netbsd/sys/arch/epoc32/epoc32/
H A Depoc32_start.S237 CPU_CONTROL_DC_ENABLE | \
/netbsd/sys/arch/evbarm/armadillo/
H A Darmadillo9_start.S62 bic r2, r2, #CPU_CONTROL_DC_ENABLE