| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 173 bool IsDiv, bool IsSigned) const;
177 bool IsDiv, bool IsSigned) const;
864 return expandDivRem24Impl(Builder, I, Num, Den, DivBits, IsDiv, IsSigned); in expandDivRem24()
944 if (!IsDiv) { in expandDivRem24Impl()
1027 bool IsDiv = Opc == Instruction::UDiv || Opc == Instruction::SDiv; in expandDivRem32() local
1044 if (Value *Res = expandDivRem24(Builder, I, X, Y, IsDiv, IsSigned)) { in expandDivRem32()
1057 Sign = IsDiv ? Builder.CreateXor(SignX, SignY) : SignX; in expandDivRem32()
1116 if (IsDiv) in expandDivRem32()
1123 if (IsDiv) in expandDivRem32()
1146 bool IsDiv = Opc == Instruction::SDiv || Opc == Instruction::UDiv; in shrinkDivRem64() local
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| H A D | AMDGPULegalizerInfo.h | 111 bool IsDiv) const;
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| H A D | AMDGPULegalizerInfo.cpp | 2798 bool IsDiv) const { in legalizeUDIV_UREM32Impl()
2824 if (IsDiv) in legalizeUDIV_UREM32Impl()
2830 if (IsDiv) in legalizeUDIV_UREM32Impl()
2979 if (IsDiv) { in legalizeUDIV_UREM64Impl()
2997 const bool IsDiv = MI.getOpcode() == AMDGPU::G_UDIV; in legalizeUDIV_UREM() local
3004 legalizeUDIV_UREM32Impl(B, DstReg, Num, Den, IsDiv); in legalizeUDIV_UREM()
3006 legalizeUDIV_UREM64Impl(B, DstReg, Num, Den, IsDiv); in legalizeUDIV_UREM()
3026 const bool IsDiv = MI.getOpcode() == AMDGPU::G_SDIV; in legalizeSDIV_SREM() local
3043 legalizeUDIV_UREM32Impl(B, UDivRem, LHS, RHS, IsDiv); in legalizeSDIV_SREM()
3045 legalizeUDIV_UREM64Impl(B, UDivRem, LHS, RHS, IsDiv); in legalizeSDIV_SREM()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 514 bool IsDiv = I.getOpcode() == G_UDIV || I.getOpcode() == G_SDIV; in select() local
526 TII.get(IsDiv ? Mips::PseudoMFLO : Mips::PseudoMFHI)) in select()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 955 bool IsDiv, IsSigned; in matchCombineDivRem() local
962 IsDiv = true; in matchCombineDivRem()
968 IsDiv = false; in matchCombineDivRem()
1003 ((IsDiv && UseMI.getOpcode() == RemOpcode) || in matchCombineDivRem()
1004 (!IsDiv && UseMI.getOpcode() == DivOpcode)) && in matchCombineDivRem()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 926 static Value *simplifyDivRem(Value *Op0, Value *Op1, bool IsDiv, in simplifyDivRem() argument
967 return IsDiv ? ConstantInt::get(Ty, 1) : Constant::getNullValue(Ty); in simplifyDivRem()
977 return IsDiv ? Op0 : Constant::getNullValue(Ty); in simplifyDivRem()
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| /netbsd/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 10266 SourceLocation Loc, bool IsDiv) { in DiagnoseBadDivideOrRemainderValues() argument
10274 << IsDiv << RHS.get()->getSourceRange()); in DiagnoseBadDivideOrRemainderValues()
10279 bool IsCompAssign, bool IsDiv) { in CheckMultiplyDivideOperands() argument
10288 if (!IsDiv && in CheckMultiplyDivideOperands()
10293 if (IsDiv && LHSTy->isConstantMatrixType() && RHSTy->isArithmeticType()) in CheckMultiplyDivideOperands()
10304 if (IsDiv) { in CheckMultiplyDivideOperands()
10305 DiagnoseBadDivideOrRemainderValues(*this, LHS, RHS, Loc, IsDiv); in CheckMultiplyDivideOperands()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4074 bool IsDiv = (ISD::SDIV == Opc) || (ISD::UDIV == Opc); in simplifyDivRem() local
4099 return DAG.getConstant(IsDiv ? 1 : 0, DL, VT); in simplifyDivRem()
4108 return IsDiv ? N0 : DAG.getConstant(0, DL, VT); in simplifyDivRem()
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