/netbsd/external/gpl3/gcc.old/dist/libgcc/config/msp430/ |
H A D | srai.S | 121 MOV R11, R15 ; Free up R11 first 122 MOV R12, R11 ; Save the shift amount in R11 126 CMP #0, R11 138 ADD #-1,R11
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H A D | slli.S | 122 MOV R11, R15 ; Free up R11 first 123 MOV R12, R11 ; Save the shift amount in R11 127 CMP #0,R11 139 ADD #-1,R11
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H A D | srli.S | 125 MOV R11, R15 ; Free up R11 first 126 MOV R12, R11 ; Save the shift amount in R11 130 CMP #0,R11 143 ADD #-1,R11
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/netbsd/external/gpl3/gcc/dist/libgcc/config/msp430/ |
H A D | slli.S | 137 MOV R11, R15 ; Free up R11 first 138 MOV R12, R11 ; Save the shift amount in R11 142 CMP #0,R11 154 ADD #-1,R11
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H A D | srai.S | 136 MOV R11, R15 ; Free up R11 first 137 MOV R12, R11 ; Save the shift amount in R11 141 CMP #0, R11 153 ADD #-1,R11
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H A D | srli.S | 141 MOV R11, R15 ; Free up R11 first 142 MOV R12, R11 ; Save the shift amount in R11 146 CMP #0,R11 159 ADD #-1,R11
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/netbsd/sys/arch/vax/boot/boot/ |
H A D | consio2.S | 64 ENTRY(ka630_rom_getchar, 0x0802) # save-mask: R1, R11 82 ENTRY(ka630_rom_putchar, 0x802) # save-mask: R1, R11 95 ENTRY(ka53_rom_getchar, 0x0802) # save-mask: R1, R11 114 ENTRY(ka53_rom_putchar, 0x0802) # save-mask: R1, R11
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.td | 36 def R11 : Ri<11, "r11">, DwarfRegNum<[11]>; 50 R11)>; 56 R11, CP, DP, SP, LR)> {
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H A D | XCoreCallingConv.td | 30 // The 'nest' parameter, if any, is passed in R11. 31 CCIfNest<CCAssignToReg<[R11]>>,
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H A D | XCoreInstrInfo.td | 638 let Uses = [R11], isCall=1 in 656 let Defs = [R11], isReMaterializable = 1 in 660 let Defs = [R11] in 685 let Defs = [R11], isReMaterializable = 1 in { 708 Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in { 989 Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in { 1003 let Uses=[R11] in { 1049 let Defs = [R11] in { 1052 [(set R11, (int_xcore_getid))]>; 1056 [(set R11, (int_xcore_geted))]>; [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiRegisterInfo.td | 36 def RR2 : LanaiReg<11, "rr2", [R11]>, DwarfRegAlias<R11>; 50 R10, RR1, R11, RR2, // programmer controlled registers
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/netbsd/crypto/external/bsd/openssl.old/dist/crypto/sha/asm/ |
H A D | keccak1600-avx512vl.pl | 56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21)); 110 vprolvq $R11,$A11,@T[1] # $A11 -> future $A01 215 vmovdqa64 5*32(%r8),$R11 301 vmovdqa64 5*32(%r8),$R11
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/netbsd/crypto/external/bsd/openssl/dist/crypto/sha/asm/ |
H A D | keccak1600-avx512vl.pl | 56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21)); 110 vprolvq $R11,$A11,@T[1] # $A11 -> future $A01 215 vmovdqa64 5*32(%r8),$R11 301 vmovdqa64 5*32(%r8),$R11
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/netbsd/external/bsd/pcc/dist/pcc/arch/pdp10/ |
H A D | macdefs.h | 170 #define R11 011 macro 229 { R10, R11, XR7, XR11, -1 }, \ 230 { R11, R12, XR10, XR12, -1 }, \
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/netbsd/external/gpl3/gcc/dist/libgcc/config/rl78/ |
H A D | fpbit-sf.S | 30 ;; Output to R8..R11. 272 ;; Input at [SP+4]..[SP+7], result is in (lsb) R8..R11 (msb). 331 ;; Input at [SP+4]..[SP+7], result is in (lsb) R8..R11 (msb) 349 ;; A X R11 R10 353 ;; A X R11 R10 402 ;; H X R11 R10 472 ;; Argument in [SP+4]..[SP+7]. Result in R8..R11. 519 ;; Argument in [SP+4]..[SP+7]. Result in R8..R11. 568 ;; R11 R10 R9 R8
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/netbsd/external/gpl3/gcc.old/dist/libgcc/config/rl78/ |
H A D | fpbit-sf.S | 30 ;; Output to R8..R11. 272 ;; Input at [SP+4]..[SP+7], result is in (lsb) R8..R11 (msb). 331 ;; Input at [SP+4]..[SP+7], result is in (lsb) R8..R11 (msb) 349 ;; A X R11 R10 353 ;; A X R11 R10 402 ;; H X R11 R10 472 ;; Argument in [SP+4]..[SP+7]. Result in R8..R11. 519 ;; Argument in [SP+4]..[SP+7]. Result in R8..R11. 568 ;; R11 R10 R9 R8
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86IndirectThunks.cpp | 96 BuildMI(&MF.front(), DebugLoc(), TII->get(X86::JMP64r)).addReg(X86::R11); in populateThunk() 97 MF.front().addLiveIn(X86::R11); in populateThunk() 160 ThunkReg = X86::R11; in populateThunk()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.td | 122 CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>> 270 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4, 275 def CSR_Win_AAPCS_CFGuard_Check : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, 286 R11, R10, R9, R8, 297 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, 321 def CSR_iOS_CXX_TLS_PE : CalleeSavedRegs<(add LR, R12, R11, R7, R5, R4)>; 340 // FIXME: we mark R11 as callee-saved since it's often the frame-pointer, and 343 def CSR_FIQ : CalleeSavedRegs<(add LR, R11, (sequence "R%u", 7, 0))>;
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.td | 55 def R11 : AVRReg<11, "r11">, DwarfRegNum<[11]>; 100 def R11R10 : AVRReg<10, "r11:r10", [R10, R11]>, DwarfRegNum<[10]>; 115 def R12R11 : AVRReg<11, "r12:r11", [R11, R12]>, DwarfRegNum<[11]>; 131 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10, 138 add R15, R14, R13, R12, R11, R10, R9, R8, R7, R6, R5, R4, R3, R2, R0, R1
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/netbsd/external/gpl3/gdb/dist/gdbserver/ |
H A D | netbsd-amd64-low.cc | 106 netbsd_x86_64_collect_gp (AMD64_R11_REGNUM, R11); in netbsd_x86_64_fill_gregset() 143 netbsd_x86_64_supply_gp (AMD64_R11_REGNUM, R11); in netbsd_x86_64_store_gregset()
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/netbsd/external/gpl3/gdb.old/dist/gdbserver/ |
H A D | netbsd-amd64-low.cc | 106 netbsd_x86_64_collect_gp (AMD64_R11_REGNUM, R11); in netbsd_x86_64_fill_gregset() 143 netbsd_x86_64_supply_gp (AMD64_R11_REGNUM, R11); in netbsd_x86_64_store_gregset()
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/netbsd/external/gpl3/gdb/dist/gas/testsuite/gas/tic4x/ |
H A D | addressing.s | 148 addf3 R11,R0,R0 175 addf3 R0,R11,R0 284 fix R11,R0 285 absf R11,R0 302 ldf R0,R11
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/netbsd/external/gpl3/gdb.old/dist/gas/testsuite/gas/tic4x/ |
H A D | addressing.s | 148 addf3 R11,R0,R0 175 addf3 R0,R11,R0 284 fix R11,R0 285 absf R11,R0 302 ldf R0,R11
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs() 59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
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H A D | MSP430RegisterInfo.td | 66 def R11 : MSP430RegWithSubregs<11, "r11", [R11B]>; 83 (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5,
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