1 ;; 2 ;; test all addressing modes and register constraints 3 ;; (types/classes is read from include/opcodes/tic4x.h) 4 ;; 5 .text 6start: 7 8 ;; 9 ;; Type B - infix condition branch 10 ;; 11Type_BI:bu Type_BI ; Unconditional branch (00000) 12 bc Type_BI ; Carry branch (00001) 13 blo Type_BI ; Lower than branch (00001) 14 bls Type_BI ; Lower than or same branch (00010) 15 bhi Type_BI ; Higher than branch (00011) 16 bhs Type_BI ; Higher than or same branch (00100) 17 bnc Type_BI ; No carry branch (00100) 18 beq Type_BI ; Equal to branch (00101) 19 bz Type_BI ; Zero branch (00101) 20 bne Type_BI ; Not equal to branch (00110) 21 bnz Type_BI ; Not zero branch (00110) 22 blt Type_BI ; Less than branch (00111) 23 bn Type_BI ; Negative branch (00111) 24 ble Type_BI ; Less than or equal to branch (01000) 25 bgt Type_BI ; Greater than branch (01001) 26 bp Type_BI ; Positive branch (01001) 27 bge Type_BI ; Greater than or equal branch (01010) 28 bnn Type_BI ; Nonnegative branch (01010) 29 bnv Type_BI ; No overflow branch (01000) 30 bv Type_BI ; Overflow branch (01101) 31 bnuf Type_BI ; No underflow branch (01110) 32 buf Type_BI ; Underflow branch (01111) 33 bnlv Type_BI ; No latched overflow branch (10000) 34 blv Type_BI ; Latched overflow branch (10001) 35 bnluf Type_BI ; No latched FP underflow branch (10010) 36 bluf Type_BI ; Latched FP underflow branch (10011) 37 bzuf Type_BI ; Zero or FP underflow branch (10100) 38 b Type_BI ; Unconditional branch (00000) 39 40 ;; 41 ;; Type C - infix condition load 42 ;; 43Type_CI:ldiu R0,R0 ; Unconditional load (00000) 44 ldic R0,R0 ; Carry load (00001) 45 ldilo R0,R0 ; Lower than load (00001) 46 ldils R0,R0 ; Lower than or same load (00010) 47 ldihi R0,R0 ; Higher than load (00011) 48 ldihs R0,R0 ; Higher than or same load (00100) 49 ldinc R0,R0 ; No carry load (00100) 50 ldieq R0,R0 ; Equal to load (00101) 51 ldiz R0,R0 ; Zero load (00101) 52 ldine R0,R0 ; Not equal to load (00110) 53 ldinz R0,R0 ; Not zero load (00110) 54 ldil R0,R0 ; Less than load (00111) 55 ldin R0,R0 ; Negative load (00111) 56 ldile R0,R0 ; Less than or equal to load (01000) 57 ldigt R0,R0 ; Greater than load (01001) 58 ldip R0,R0 ; Positive load (01001) 59 ldige R0,R0 ; Greater than or equal load (01010) 60 ldinn R0,R0 ; Nonnegative load (01010) 61 ldinv R0,R0 ; No overflow load (01000) 62 ldiv R0,R0 ; Overflow load (01101) 63 ldinuf R0,R0 ; No underflow load (01110) 64 ldiuf R0,R0 ; Underflow load (01111) 65 ldinlv R0,R0 ; No latched overflow load (10000) 66 ldilv R0,R0 ; Latched overflow load (10001) 67 ldinluf R0,R0 ; No latched FP underflow load (10010) 68 ldiluf R0,R0 ; Latched FP underflow load (10011) 69 ldizuf R0,R0 ; Zero or FP underflow load (10100) 70 71 ;; 72 ;; Type * - Indirect (full) 73 ;; 74Type_ind: 75 ldi *AR0,R0 ; Indirect addressing (G=10) 76 ldi *+AR0(5),R0 ; with predisplacement add 77 ldi *-AR0(5),R0 ; with predisplacement subtract 78 ldi *++AR0(5),R0 ; with predisplacement add and modify 79 ldi *--AR0(5),R0 ; with predisplacement subtract and modify 80 ldi *AR0++(5),R0 ; with postdisplacement add and modify 81 ldi *AR0--(5),R0 ; with postdisplacement subtract and modify 82 ldi *AR0++(5)%,R0 ; with postdisplacement add and circular modify 83 ldi *AR0--(5)%,R0 ; with postdisplacement subtract and circular modify 84 ldi *+AR0(IR0),R0 ; with predisplacement add 85 ldi *-AR0(IR0),R0 ; with predisplacement subtract 86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify 87 ldi *--AR0(IR0),R0 ; with predisplacement subtract and modify 88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify 89 ldi *AR0--(IR0),R0 ; with postdisplacement subtract and modify 90 ldi *AR0++(IR0)%,R0 ; with postdisplacement add and circular modify 91 ldi *AR0--(IR0)%,R0 ; with postdisplacement subtract and circular modify 92 ldi *AR0++(IR0)B,R0 ; with postincrement add and bit-reversed modify 93 ldi *AR0++,R0 ; Same as *AR0++(1) 94 95 ;; 96 ;; Type # - Direct for ldp 97 ;; 98Type_ldp: 99 ldp 12 100 ldp @start 101 ldp start 102 103 ;; 104 ;; Type @ - Direct 105 ;; 106Type_dir: 107 ldi @start,R0 108 ldi start,R0 109 ldi @16,R0 110 ldi @65535,R0 111 112 ;; 113 ;; Type A - Address register 114 ;; 115Type_A: dbc AR0,R0 116 dbc AR2,R0 117 dbc AR7,R0 118 119 ;; 120 ;; Type B - Unsigned integer (PC) 121 ;; 122Type_B: br start 123 br 0x809800 124 125 ;; 126 ;; Type C - Indirect 127 ;; 128 .ifdef TEST_C4X 129Type_C: addc3 *+AR0(5),R0,R0 130 .endif 131 132 ;; 133 ;; Type E - Register (all) 134 ;; 135Type_E: andn3 R0,R0,R0 136 andn3 AR0,R0,R0 137 addc3 DP,R0,R0 138 andn3 R7,R0,R0 139 140 ;; 141 ;; Type e - Register (0-11) 142 ;; 143Type_ee:subf3 R7,R0,R0 144 addf3 R0,R0,R0 145 addf3 R7,R0,R0 146 cmpf3 R7,R0 147 .ifdef TEST_C4X 148 addf3 R11,R0,R0 149 .endif 150 151 ;; 152 ;; Type F - Short float immediate 153 ;; 154Type_F: ldf 0,R0 155 ldf 3.5,R0 156 ldf -3.5,R0 157 ldf 0e-3.5e-1,R0 158 159 ;; 160 ;; Type G - Register (all) 161 ;; 162Type_G: andn3 R0,AR0,R0 163 addc3 R0,DP,R0 164 addc3 R0,R0,R0 165 andn3 R0,R7,R0 166 167 ;; 168 ;; Type g - Register (0-11) 169 ;; 170Type_gg:subf3 R0,R7,R0 171 addf3 R0,R0,R0 172 addf3 R0,R7,R0 173 cmpf3 R0,R7 174 .ifdef TEST_C4X 175 addf3 R0,R11,R0 176 .endif 177 178 ;; 179 ;; Type H - Register (0-7) 180 ;; 181Type_H: stf R0,*AR0 &|| stf R0,*AR0 182 stf R0,*AR0 &|| stf R2,*AR0 183 stf R0,*AR0 &|| stf R7,*AR0 184 185 ;; 186 ;; Type I - Indirect 187 ;; 188Type_I: addf3 *AR0,R0,R0 ; Indirect addressing (G=10) 189 addf3 *+AR0(1),R0,R0 ; with predisplacement add 190 addf3 *-AR0(1),R0,R0 ; with predisplacement subtract 191 addf3 *++AR0(1),R0,R0 ; with predisplacement add and modify 192 addf3 *--AR0(1),R0,R0 ; with predisplacement subtract and modify 193 addf3 *AR0++(1),R0,R0 ; with postdisplacement add and modify 194 addf3 *AR0--(1),R0,R0 ; with postdisplacement subtract and modify 195 addf3 *AR0++(1)%,R0,R0; with postdisplacement add and circular modify 196 addf3 *AR0--(1)%,R0,R0; with postdisplacement subtract and circular modify 197 addf3 *+AR0(IR0),R0,R0; with predisplacement add 198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract 199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify 200 addf3 *--AR0(IR0),R0,R0; with predisplacement subtract and modify 201 addf3 *AR0++(IR0),R0,R0; with postdisplacement add and modify 202 addf3 *AR0--(IR0),R0,R0; with postdisplacement subtract and modify 203 addf3 *AR0++(IR0)%,R0,R0; with postdisplacement add and circular modify 204 addf3 *AR0--(IR0)%,R0,R0; with postdisplacement subtract and circular modify 205 addf3 *AR0++(IR0)B,R0,R0; with postincrement add and bit-reversed modify 206 addf3 *AR0++,R0,R0 ; Same as *AR0++(1) 207 208 ;; 209 ;; Type J - Indirect 210 ;; 211Type_J: addf3 R0,*AR0,R0 ; Indirect addressing (G=10) 212 addf3 R0,*+AR0(1),R0 ; with predisplacement add 213 addf3 R0,*-AR0(1),R0 ; with predisplacement subtract 214 addf3 R0,*++AR0(1),R0 ; with predisplacement add and modify 215 addf3 R0,*--AR0(1),R0 ; with predisplacement subtract and modify 216 addf3 R0,*AR0++(1),R0 ; with postdisplacement add and modify 217 addf3 R0,*AR0--(1),R0 ; with postdisplacement subtract and modify 218 addf3 R0,*AR0++(1)%,R0; with postdisplacement add and circular modify 219 addf3 R0,*AR0--(1)%,R0; with postdisplacement subtract and circular modify 220 addf3 R0,*+AR0(IR0),R0; with predisplacement add 221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract 222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify 223 addf3 R0,*--AR0(IR0),R0; with predisplacement subtract and modify 224 addf3 R0,*AR0++(IR0),R0; with postdisplacement add and modify 225 addf3 R0,*AR0--(IR0),R0; with postdisplacement subtract and modify 226 addf3 R0,*AR0++(IR0)%,R0; with postdisplacement add and circular modify 227 addf3 R0,*AR0--(IR0)%,R0; with postdisplacement subtract and circular modify 228 addf3 R0,*AR0++(IR0)B,R0; with postincrement add and bit-reversed modify 229 addf3 R0,*AR0++,R0 ; Same as *AR0++(1) 230 231 ;; 232 ;; Type K - Register (0-7) 233 ;; 234Type_K: ldf *AR0,R0 &|| ldf *AR0,R1 235 ldf *AR0,R0 &|| ldf *AR0,R2 236 ldf *AR0,R0 &|| ldf *AR0,R7 237 238 ;; 239 ;; Type L - Register (0-7) 240 ;; 241Type_L: stf R0,*AR0 &|| stf R0,*AR0 242 stf R2,*AR0 &|| stf R0,*AR0 243 stf R7,*AR0 &|| stf R0,*AR0 244 245 ;; 246 ;; Type M - Register (2-3) 247 ;; 248Type_M: mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R2 249 mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R3 250 251 ;; 252 ;; Type N - Register (0-1) 253 ;; 254Type_N: mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R2 255 mpyf3 *AR0,*AR0,R1 &|| addf3 R0,R0,R2 256 257 ;; 258 ;; Type O - Indirect 259 ;; 260 .ifdef TEST_C4X 261Type_O: addc3 *+AR0(5),*+AR0(5),R0 262 .endif 263 264 ;; 265 ;; Type P - Displacement (PC rel) 266 ;; 267Type_P: callc start 268 callc 1 269 270 ;; 271 ;; Type Q - Register (all) 272 ;; 273Type_Q: ldi R0,R0 274 ldi AR0,R0 275 ldi DP,R0 276 ldi SP,R0 277 278 ;; 279 ;; Type q - Register (0-11) 280 ;; 281Type_qq:fix R0,R0 282 fix R7,R0 283 .ifdef TEST_C4X 284 fix R11,R0 285 absf R11,R0 286 .endif 287 288 ;; 289 ;; Type R - Register (all) 290 ;; 291Type_R: ldi R0,R0 292 ldi R0,AR0 293 ldi R0,DP 294 ldi R0,SP 295 296 ;; 297 ;; Type r - Register (0-11) 298 ;; 299Type_rr:ldf R0,R0 300 ldf R0,R7 301 .ifdef TEST_C4X 302 ldf R0,R11 303 .endif 304 305 ;; 306 ;; Type S - Signed immediate 307 ;; 308Type_S: ldi 0,R0 309 ldi -123,R0 310 ldi 6543,R0 311 ldi -32768, R0 312 313 ;; 314 ;; Type T - Integer 315 ;; 316 .ifdef TEST_C4X 317Type_T: stik 0,*AR0 318 stik 12,*AR0 319 stik -5,*AR0 320 .endif 321 322 ;; 323 ;; Type U - Unsigned integer 324 ;; 325Type_U: and 0,R0 326 and 256,R0 327 and 65535,R0 328 329 ;; 330 ;; Type V - Vector 331 ;; 332Type_V: trapu 12 333 trapu 0 334 trapu 31 335 .ifdef TEST_C4X 336 trapu 511 337 .endif 338 339 ;; 340 ;; Type W - Short int 341 ;; 342 .ifdef TEST_C4X 343Type_W: addc3 -3,R0,R0 344 addc3 5,R0,R0 345 .endif 346 347 ;; 348 ;; Type X - Expansion register 349 ;; 350 .ifdef TEST_C4X 351Type_X: ldep IVTP,R0 352 ldep TVTP,R0 353 .endif 354 355 ;; 356 ;; Type Y - Address register 357 ;; 358 .ifdef TEST_C4X 359Type_Y: lda R0,AR0 360 lda R0,DP 361 lda R0,SP 362 lda R0,IR0 363 .endif 364 365 ;; 366 ;; Type Z - Expansion register 367 ;; 368 .ifdef TEST_C4X 369Type_Z: ldpe R0,IVTP 370 ldpe R0,TVTP 371 .endif 372