| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 706 SRA_PARTS, enumerator
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 396 setOperationAction(ISD::SRA_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
399 setOperationAction(ISD::SRA_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
1947 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
1955 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
2179 case ISD::SRA_PARTS: in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 115 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
116 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 312 case ISD::SRA_PARTS: return "sra_parts"; in getOperationName()
|
| H A D | LegalizeDAG.cpp | 1222 case ISD::SRA_PARTS: in LegalizeOp()
|
| H A D | LegalizeIntegerTypes.cpp | 3751 PartsOpc = ISD::SRA_PARTS; in ExpandIntRes_Shift()
|
| H A D | TargetLowering.cpp | 6611 bool IsSRA = Node->getOpcode() == ISD::SRA_PARTS; in expandShiftParts()
|
| H A D | SelectionDAG.cpp | 7984 case ISD::SRA_PARTS: in getNode()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 115 setOperationAction(ISD::SRA_PARTS, VT, Expand); in BPFTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 195 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in R600TargetLowering()
455 case ISD::SRA_PARTS: in LowerOperation()
|
| H A D | SIISelLowering.cpp | 235 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SITargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 123 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in LanaiTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 376 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in MipsTargetLowering()
382 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in MipsTargetLowering()
1227 case ISD::SRA_PARTS: return lowerShiftRightParts(Op, DAG, true); in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1653 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1687 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SparcTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 89 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in AVRTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 129 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS, in WebAssemblyTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 102 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 167 setOperationAction(ISD::SRA_PARTS, IntVT, Expand); in initSPUActions()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1586 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1128 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in ARMTargetLowering()
1145 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in ARMTargetLowering()
6025 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
6027 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
9883 case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG); in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 238 setOperationAction(ISD::SRA_PARTS, XLenVT, Custom); in RISCVTargetLowering()
1938 case ISD::SRA_PARTS: in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 689 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in PPCTargetLowering()
694 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in PPCTargetLowering()
10827 case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG); in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 401 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
4589 case ISD::SRA_PARTS: in LowerOperation()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 291 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 492 setOperationAction(ISD::SRA_PARTS, VT, Custom); in X86TargetLowering()
30285 case ISD::SRA_PARTS: in LowerOperation()
|