| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 93 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
96 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
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| H A D | AMDGPUCallLowering.cpp | 800 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
850 LI->loadInputValue(InputReg, MIRBuilder, IncomingArgX, in passSpecialInputs()
856 LI->loadInputValue(Y, MIRBuilder, IncomingArgY, std::get<1>(WorkitemIDY), in passSpecialInputs()
865 LI->loadInputValue(Z, MIRBuilder, IncomingArgZ, std::get<1>(WorkitemIDZ), in passSpecialInputs()
880 LI->loadInputValue(InputReg, MIRBuilder, &IncomingArg, in passSpecialInputs()
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| H A D | AMDGPUISelLowering.h | 309 SDValue loadInputValue(SelectionDAG &DAG,
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| H A D | AMDGPULegalizerInfo.cpp | 1769 if (!loadInputValue(QueuePtr, B, AMDGPUFunctionArgInfo::QUEUE_PTR)) in getSegmentAperture()
2720 bool AMDGPULegalizerInfo::loadInputValue(Register DstReg, MachineIRBuilder &B, in loadInputValue() function in AMDGPULegalizerInfo
2751 bool AMDGPULegalizerInfo::loadInputValue( in loadInputValue() function in AMDGPULegalizerInfo
2762 return loadInputValue(DstReg, B, Arg, ArgRC, ArgTy); in loadInputValue()
2768 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
3486 if (!loadInputValue(KernargPtrReg, B, in getImplicitArgPtr()
4566 if (!loadInputValue(LiveIn, B, AMDGPUFunctionArgInfo::QUEUE_PTR)) in legalizeTrapHsaQueuePtr()
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| H A D | SIISelLowering.cpp | 2742 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2792 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2795 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
2803 SDValue Z = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgZ); in passSpecialInputs()
2817 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, IncomingArg); in passSpecialInputs()
6535 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
6539 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
6543 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
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| H A D | AMDGPUISelLowering.cpp | 4166 SDValue AMDGPUTargetLowering::loadInputValue(SelectionDAG &DAG, in loadInputValue() function in AMDGPUTargetLowering
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