/openbsd/sys/dev/fdt/ |
H A D | if_mvppreg.h | 165 #define MVPP2_PREF_BUF_SIZE_4 (BIT(12) | BIT(13)) 166 #define MVPP2_PREF_BUF_SIZE_16 (BIT(12) | BIT(14)) 1094 #define MVPP2_PRS_RI_VLAN_NONE ~(BIT(2) | BIT(3)) 1097 #define MVPP2_PRS_RI_VLAN_TRIPLE (BIT(2) | BIT(3)) 1101 #define MVPP2_PRS_RI_L2_UCAST ~(BIT(9) | BIT(10)) 1106 #define MVPP2_PRS_RI_L3_UN ~(BIT(12) | BIT(13) | BIT(14)) 1112 #define MVPP2_PRS_RI_L3_ARP (BIT(13) | BIT(14)) 1116 #define MVPP2_PRS_RI_L3_BCAST (BIT(15) | BIT(16)) 1123 #define MVPP2_PRS_RI_L4_OTHER (BIT(22) | BIT(23)) 1192 #define MVPP2_RXD_ERR_RESOURCE (BIT(13) | BIT(14)) [all …]
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/openbsd/sys/dev/pci/drm/i915/display/ |
H A D | intel_display_device.c | 408 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E… 428 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E… 468 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E… 554 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E… 560 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), 599 BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \ 614 BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4) | BIT(PORT_TC5) | BIT(PORT_TC6), 643 BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4), 687 BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D) 699 BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4), [all …]
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H A D | skl_watermark.c | 883 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), 946 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), 974 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_D), 989 .active_pipes = BIT(PIPE_A) | BIT(PIPE_C) | BIT(PIPE_D), 997 .active_pipes = BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), 1005 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), 1057 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), 1116 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), 1135 [PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4), 1142 [PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4), [all …]
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/openbsd/sys/dev/pci/drm/i915/ |
H A D | i915_pci.c | 454 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 506 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1) 569 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 590 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 623 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 652 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 687 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 695 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 751 BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3), 770 BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3) [all …]
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H A D | vlv_sideband.h | 36 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get() 44 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put() 49 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_get() 57 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_put() 62 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_get() 70 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_put() 75 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_get() 84 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_put() 102 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC)); in vlv_nc_get() 109 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC)); in vlv_nc_put() [all …]
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H A D | intel_uncore.h | 71 FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER), 72 FORCEWAKE_GT = BIT(FW_DOMAIN_ID_GT), 73 FORCEWAKE_MEDIA = BIT(FW_DOMAIN_ID_MEDIA), 74 FORCEWAKE_MEDIA_VDBOX0 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX0), 86 FORCEWAKE_GSC = BIT(FW_DOMAIN_ID_GSC), 88 FORCEWAKE_ALL = BIT(FW_DOMAIN_ID_COUNT) - 1, 152 #define UNCORE_HAS_FORCEWAKE BIT(0) 153 #define UNCORE_HAS_FPGA_DBG_UNCLAIMED BIT(1) 154 #define UNCORE_HAS_DBG_UNCLAIMED BIT(2) 155 #define UNCORE_HAS_FIFO BIT(3) [all …]
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H A D | i915_vma_types.h | 248 #define I915_VMA_GLOBAL_BIND ((int)BIT(I915_VMA_GLOBAL_BIND_BIT)) 249 #define I915_VMA_LOCAL_BIND ((int)BIT(I915_VMA_LOCAL_BIND_BIT)) 254 #define I915_VMA_ERROR ((int)BIT(I915_VMA_ERROR_BIT)) 261 #define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT)) 262 #define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT)) 263 #define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT)) 264 #define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT)) 267 #define I915_VMA_SCANOUT ((int)BIT(I915_VMA_SCANOUT_BIT)) 272 #define I915_VMA_PAGES_ACTIVE (BIT(24) | 1)
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/openbsd/bin/ksh/ |
H A D | table.h | 40 #define DEFINED BIT(1) /* is defined in block */ 48 #define RDONLY BIT(10) /* read-only variable */ 49 #define LOCAL BIT(11) /* for local typeset() */ 50 #define ARRAY BIT(13) /* array */ 51 #define LJUST BIT(14) /* left justify */ 52 #define RJUST BIT(15) /* right justify */ 56 #define INT_U BIT(19) /* unsigned integer */ 85 #define FC_SPECBI BIT(0) /* special builtin */ 86 #define FC_FUNC BIT(1) /* function builtin */ 87 #define FC_REGBI BIT(2) /* regular builtin */ [all …]
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H A D | tree.h | 90 #define IOEVAL BIT(4) /* expand in << */ 91 #define IOSKIP BIT(5) /* <<-, skip ^\t* */ 97 #define XEXEC BIT(0) /* execute without forking */ 98 #define XFORK BIT(1) /* fork before executing */ 99 #define XBGND BIT(2) /* command & */ 100 #define XPIPEI BIT(3) /* input is pipe */ 101 #define XPIPEO BIT(4) /* output is pipe */ 103 #define XXCOM BIT(5) /* `...` command */ 108 #define XTIME BIT(10) /* timing TCOM command */ 115 #define DOGLOB BIT(1) /* expand [?* */ [all …]
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H A D | lex.h | 46 #define SF_ECHO BIT(0) /* echo input to shlout */ 47 #define SF_ALIAS BIT(1) /* faking space at end of alias */ 49 #define SF_TTY BIT(3) /* type == SSTDIN & it is a tty */ 90 #define ALIAS BIT(2) /* recognize alias */ 91 #define KEYWORD BIT(3) /* recognize keywords */ 92 #define LETEXPR BIT(4) /* get expression inside (( )) */ 93 #define VARASN BIT(5) /* check for var=word */ 95 #define ESACONLY BIT(7) /* only accept esac keyword */ 97 #define HEREDELIM BIT(9) /* parsing <<,<<- delimiter */ 98 #define HEREDOC BIT(10) /* parsing heredoc */ [all …]
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H A D | sh.h | 23 #define BIT(i) (1<<(i)) /* define bit in flag */ macro 96 #define EF_FUNC_PARSE BIT(0) /* function being parsed */ 273 #define C_ALPHA BIT(0) /* a-z_A-Z */ 275 #define C_LEX1 BIT(2) /* \0 \t\n|&;<>() */ 276 #define C_VAR1 BIT(3) /* *@#!$-? */ 277 #define C_IFSWS BIT(4) /* \t \n (IFS white space) */ 278 #define C_SUBOP1 BIT(5) /* "=-+?" */ 279 #define C_SUBOP2 BIT(6) /* "#%" */ 280 #define C_IFS BIT(7) /* $IFS */ 296 #define GF_PLUSOPT BIT(1) /* allow +c as an option */ [all …]
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/openbsd/sys/dev/pci/ |
H A D | if_icereg.h | 39 #define BIT(x) (1UL << (x)) macro 86 #define MSIX_TVCTRL_MASK_M BIT(0) 3130 #define GL_FWSTS_FWRI_M BIT(9) 5156 #define QRX_CTRL_CDE_M BIT(3) 5158 #define QRX_CTRL_CDS_M BIT(4) 9035 #define PFPM_WUS_MAG_M BIT(1) 9039 #define PFPM_WUS_MNG_M BIT(3) 11040 #define ICE_AQ_FEC_EN BIT(3) 11127 #define ICE_AQ_PHY_LB_EN BIT(0) 11140 #define ICE_AQ_MAC_LB_EN BIT(0) [all …]
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/openbsd/sys/dev/pci/drm/include/drm/ |
H A D | gud.h | 45 #define GUD_DISPLAY_FLAG_FULL_UPDATE BIT(1) 47 #define GUD_COMPRESSION_LZ4 BIT(0) 92 #define GUD_DISPLAY_MODE_FLAG_PHSYNC BIT(0) 98 #define GUD_DISPLAY_MODE_FLAG_CSYNC BIT(6) 101 #define GUD_DISPLAY_MODE_FLAG_HSKEW BIT(9) 221 #define GUD_ROTATION_0 BIT(0) 222 #define GUD_ROTATION_90 BIT(1) 223 #define GUD_ROTATION_180 BIT(2) 224 #define GUD_ROTATION_270 BIT(3) 225 #define GUD_ROTATION_REFLECT_X BIT(4) [all …]
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H A D | drm_drv.h | 63 DRIVER_GEM = BIT(0), 69 DRIVER_MODESET = BIT(1), 76 DRIVER_RENDER = BIT(3), 86 DRIVER_ATOMIC = BIT(4), 114 DRIVER_GEM_GPUVA = BIT(8), 133 DRIVER_USE_AGP = BIT(25), 139 DRIVER_LEGACY = BIT(26), 146 DRIVER_PCI_DMA = BIT(27), 154 DRIVER_SG = BIT(28), 162 DRIVER_HAVE_DMA = BIT(29), [all …]
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/openbsd/sys/dev/ic/ |
H A D | qwxreg.h | 208 WMI_HE_AUTORATE_LTF_1X = BIT(0), 209 WMI_HE_AUTORATE_LTF_2X = BIT(1), 210 WMI_HE_AUTORATE_LTF_4X = BIT(2), 213 WMI_AUTORATE_400NS_GI = BIT(8), 214 WMI_AUTORATE_800NS_GI = BIT(9), 215 WMI_AUTORATE_1600NS_GI = BIT(10), 216 WMI_AUTORATE_3200NS_GI = BIT(11), 3010 #define HE_MODE_DL_OFDMA BIT(4) 3011 #define HE_MODE_UL_OFDMA BIT(5) 10295 #define TARGET_TX_CHAIN_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(4)) [all …]
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H A D | qwzreg.h | 204 WMI_HE_AUTORATE_LTF_1X = BIT(0), 205 WMI_HE_AUTORATE_LTF_2X = BIT(1), 206 WMI_HE_AUTORATE_LTF_4X = BIT(2), 209 WMI_AUTORATE_400NS_GI = BIT(8), 210 WMI_AUTORATE_800NS_GI = BIT(9), 211 WMI_AUTORATE_1600NS_GI = BIT(10), 212 WMI_AUTORATE_3200NS_GI = BIT(11), 3081 #define HE_MODE_DL_OFDMA BIT(4) 3082 #define HE_MODE_UL_OFDMA BIT(5) 10798 #define TARGET_TX_CHAIN_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(4)) [all …]
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/openbsd/sys/dev/pci/drm/i915/gem/ |
H A D | i915_gem_object_types.h | 43 #define I915_GEM_OBJECT_IS_PROXY BIT(3) 44 #define I915_GEM_OBJECT_NO_MMAP BIT(4) 215 #define I915_MAP_OVERRIDE BIT(31) 329 #define I915_BO_ALLOC_CONTIGUOUS BIT(0) 330 #define I915_BO_ALLOC_VOLATILE BIT(1) 331 #define I915_BO_ALLOC_CPU_CLEAR BIT(2) 332 #define I915_BO_ALLOC_USER BIT(3) 334 #define I915_BO_ALLOC_PM_VOLATILE BIT(4) 342 #define I915_BO_ALLOC_GPU_ONLY BIT(6) 343 #define I915_BO_ALLOC_CCS_AUX BIT(7) [all …]
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H A D | i915_gem_shrinker.h | 21 #define I915_SHRINK_UNBOUND BIT(0) 22 #define I915_SHRINK_BOUND BIT(1) 23 #define I915_SHRINK_ACTIVE BIT(2) 24 #define I915_SHRINK_VMAPS BIT(3) 25 #define I915_SHRINK_WRITEBACK BIT(4)
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/openbsd/sys/dev/pci/drm/i915/gt/uc/ |
H A D | intel_guc_fwif.h | 76 #define GUC_STAGE_DESC_ATTR_RESET BIT(4) 78 #define GUC_STAGE_DESC_ATTR_PCH BIT(6) 82 #define GUC_LOG_VALID BIT(0) 85 #define GUC_LOG_LOG_ALLOC_UNITS BIT(3) 95 #define GUC_WA_GAM_CREDITS BIT(10) 96 #define GUC_WA_DUAL_QUEUE BIT(11) 99 #define GUC_WA_PRE_PARSER BIT(14) 101 #define GUC_WA_POLLCS BIT(18) 105 #define GUC_CTL_ENABLE_SLPC BIT(2) 144 #define GUC_ENGINE_ALL_INSTANCES BIT(7) [all …]
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H A D | intel_guc_reg.h | 140 #define GUC_INTR_GUC2HOST BIT(15) 143 #define GUC_INTR_SEM_SIG BIT(12) 144 #define GUC_INTR_IOMMU2GUC BIT(11) 146 #define GUC_INTR_DMA_DONE BIT(9) 149 #define GUC_INTR_SW_INT_6 BIT(6) 150 #define GUC_INTR_SW_INT_5 BIT(5) 151 #define GUC_INTR_SW_INT_4 BIT(4) 152 #define GUC_INTR_SW_INT_3 BIT(3) 153 #define GUC_INTR_SW_INT_2 BIT(2) 154 #define GUC_INTR_SW_INT_1 BIT(1) [all …]
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/openbsd/sys/dev/pci/drm/i915/gt/ |
H A D | intel_engine_types.h | 213 #define ERROR_CSB BIT(31) 214 #define ERROR_PREEMPT BIT(30) 528 #define EMIT_INVALIDATE BIT(0) 529 #define EMIT_FLUSH BIT(1) 534 #define I915_DISPATCH_SECURE BIT(0) 535 #define I915_DISPATCH_PINNED BIT(1) 578 #define I915_ENGINE_USING_CMD_PARSER BIT(0) 579 #define I915_ENGINE_SUPPORTS_STATS BIT(1) 580 #define I915_ENGINE_HAS_PREEMPTION BIT(2) 581 #define I915_ENGINE_HAS_SEMAPHORES BIT(3) [all …]
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/openbsd/sys/dev/pci/drm/include/drm/display/ |
H A D | drm_hdcp.h | 26 #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3)) 27 #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7)) 42 #define DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT BIT(6) 43 #define DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY BIT(5) 111 #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) 112 #define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1)) 120 #define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2)) 121 #define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3)) 123 #define HDCP_2_2_DEV_COUNT_HI(x) ((x) & BIT(0)) 245 #define HDCP_2_2_HDMI_SUPPORT_MASK BIT(2) [all …]
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/openbsd/usr.bin/lastcomm/ |
H A D | lastcomm.c | 170 #define BIT(flag, ch) if (f & flag) *p++ = ch in flagbits() macro 173 BIT(AFORK, 'F'); in flagbits() 174 BIT(AMAP, 'M'); in flagbits() 175 BIT(ACORE, 'D'); in flagbits() 176 BIT(AXSIG, 'X'); in flagbits() 177 BIT(APLEDGE, 'P'); in flagbits() 178 BIT(ATRAP, 'T'); in flagbits() 179 BIT(AUNVEIL, 'U'); in flagbits() 180 BIT(APINSYS, 'S'); in flagbits() 181 BIT(ABTCFI, 'B'); in flagbits()
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/openbsd/sys/lib/libkern/arch/alpha/ |
H A D | divrem.m4 | 52 define(BIT, `t0') macro 62 stq BIT, 0(sp) 131 sll T_0, WORDSIZE-1, BIT 136 srl BIT, 1, BIT 143 sll T_0, WORDSIZE-1, BIT 149 srl BIT, 1, BIT 155 sll T_0, I, BIT 159 or RESULT, BIT, T_0 163 srl BIT, 1, BIT 166 bne BIT, Ldivloop [all …]
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/openbsd/lib/libc/arch/alpha/gen/ |
H A D | divrem.m4 | 52 define(BIT, `t0') macro 79 stq BIT, 0(sp) 80 .cfi_rel_offset BIT, 0 161 srl BIT, 1, BIT 174 srl BIT, 1, BIT 180 sll T_0, I, BIT 184 or RESULT, BIT, T_0 188 srl BIT, 1, BIT 191 bne BIT, Ldivloop 204 ldq BIT, 0(sp) [all …]
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