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Searched refs:GC_BASE__INST0_SEG1 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/
H A Dcyan_skillfish_ip_offset.h318 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dnavi10_ip_offset.h352 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Ddimgrey_cavefish_ip_offset.h511 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dnavi12_ip_offset.h490 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dnavi14_ip_offset.h490 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dvega20_ip_offset.h379 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dsienna_cichlid_ip_offset.h497 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dbeige_goby_ip_offset.h589 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Drenoir_ip_offset.h614 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dvega10_ip_offset.h846 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dvangogh_ip_offset.h677 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Dyellow_carp_offset.h631 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Darct_ip_offset.h471 #define GC_BASE__INST0_SEG1 0x0000A000 macro
H A Daldebaran_ip_offset.h514 #define GC_BASE__INST0_SEG1 0x0000A000 macro