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Searched refs:GC_BASE__INST0_SEG5 (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/
H A Dnavi10_ip_offset.h356 #define GC_BASE__INST0_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h515 #define GC_BASE__INST0_SEG5 0 macro
H A Dvega20_ip_offset.h383 #define GC_BASE__INST0_SEG5 0 macro
H A Dbeige_goby_ip_offset.h593 #define GC_BASE__INST0_SEG5 0 macro
H A Dvangogh_ip_offset.h681 #define GC_BASE__INST0_SEG5 0 macro
H A Dyellow_carp_offset.h635 #define GC_BASE__INST0_SEG5 0 macro
H A Darct_ip_offset.h475 #define GC_BASE__INST0_SEG5 0 macro
H A Daldebaran_ip_offset.h518 #define GC_BASE__INST0_SEG5 0 macro