/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrInteger.td | 21 [(set I64:$dst, (node I64:$src))], 31 defm _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins), 32 [(set I64:$dst, (node I64:$lhs, I64:$rhs))], 100 def : Pat<(shl I64:$lhs, (and I64:$rhs, 63)), (SHL_I64 I64:$lhs, I64:$rhs)>; 101 def : Pat<(sra I64:$lhs, (and I64:$rhs, 63)), (SHR_S_I64 I64:$lhs, I64:$rhs)>; 102 def : Pat<(srl I64:$lhs, (and I64:$rhs, 63)), (SHR_U_I64 I64:$lhs, I64:$rhs)>; 107 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>; 108 def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>; 114 defm SELECT_I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs, I32:$cond), 116 [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))], [all …]
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H A D | WebAssemblyInstrConv.td | 15 defm I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins), 16 [(set I32:$dst, (trunc I64:$src))], 19 defm I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins), 20 [(set I64:$dst, (sext I32:$src))], 24 [(set I64:$dst, (zext I32:$src))], 37 defm I64_EXTEND8_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins), 38 [(set I64:$dst, (sext_inreg I64:$src, i8))], 41 defm I64_EXTEND16_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins), 42 [(set I64:$dst, (sext_inreg I64:$src, i16))], 45 defm I64_EXTEND32_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins), [all …]
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H A D | WebAssemblyRuntimeLibcallSignatures.cpp | 583 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 587 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 591 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 679 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 684 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 691 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 692 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 700 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 701 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() 729 Rets.push_back(wasm::ValType::I64); in getLibcallSignature() [all …]
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H A D | WebAssemblyInstrAtomics.td | 52 I64:$timeout), 59 I64:$timeout), 66 I64:$timeout), 72 (ins P2Align:$p2align, offset64_op:$off, I64:$addr, I64:$exp, 73 I64:$timeout), 96 Pat<(i32 (kind (AddrOps64 offset64_op:$offset, I64:$addr), ty:$exp, I64:$timeout)), 264 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.add_u", 0x22>; 277 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.sub_u", 0x29>; 290 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.and_u", 0x30>; 303 WebAssemblyBinRMW<I64, "i64.atomic.rmw8.or_u", 0x37>; [all …]
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H A D | WebAssemblyInstrMemory.td | 59 defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29, []>; 68 defm LOAD8_S_I64 : WebAssemblyLoad<I64, "i64.load8_s", 0x30, []>; 69 defm LOAD8_U_I64 : WebAssemblyLoad<I64, "i64.load8_u", 0x31, []>; 70 defm LOAD16_S_I64 : WebAssemblyLoad<I64, "i64.load16_s", 0x32, []>; 87 I64:$addr)>, 138 defm STORE_I64 : WebAssemblyStore<I64, "i64.store", 0x37>; 152 I64:$addr, 165 defm STORE8_I64 : WebAssemblyStore<I64, "i64.store8", 0x3c>; 166 defm STORE16_I64 : WebAssemblyStore<I64, "i64.store16", 0x3d>; 167 defm STORE32_I64 : WebAssemblyStore<I64, "i64.store32", 0x3e>; [all …]
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H A D | WebAssemblyInstrSIMD.td | 112 let lane_rc = I64; 183 (ins P2Align:$p2align, offset64_op:$off, I64:$addr), 222 (ins P2Align:$p2align, offset64_op:$off, I64:$addr), 300 I64:$addr, V128:$vec), 320 def : Pat<(vec.vt (kind (i64 I64:$addr), 381 I64:$addr, V128:$vec), 399 def : Pat<(kind (AddrOps64 offset64_op:$offset, I64:$addr), 656 def : Pat<(vector_insert (v2i64 V128:$vec), I64:$x, undef), 975 (SHL_I64x2 V128:$lhs, (I32_WRAP_I64 I64:$rhs))>; 977 (SHR_S_I64x2 V128:$lhs, (I32_WRAP_I64 I64:$rhs))>; [all …]
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H A D | WebAssemblyInstrInfo.td | 276 defm "": ARGUMENT<I64, i64>; 358 defm "" : LOCAL<I64, global_op64>; // 64-bit only needed for pointers. 370 defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm), 372 [(set I64:$res, imm:$imm)],
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H A D | WebAssemblyInstrControl.td | 58 defm BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops), 60 [(WebAssemblybr_table I64:$index)],
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H A D | WebAssemblyRegisterInfo.td | 63 def I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64, I64_0)>;
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H A D | WebAssemblyInstrBulkMemory.td | 75 defm : BulkMemoryOps<I64, "64">;
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEInstrVec.td | 148 defm rr : VLDlm<opcStr, opc, RC, (ins I64:$sy, I64:$sz)>; 199 defm rrv : VSTmm<opcStr, opc, (ins I64:$sy, I64:$sz, RC:$vx)>; 264 !con(dag_in, (ins I64:$sy, I64:$sz))>; 316 !con(dag_in, (ins I64:$sy, I64:$sz, RC:$vx))>; 360 defm rr : PFCHVbm<opcStr, " $sy, $sz", opc, (ins I64:$sy, I64:$sz)>; 382 defm rr : LSVbm<opcStr, "(${sy}), $sz", opc, RC, (ins I64:$sy, I64:$sz)>; 395 def vr : RR<opc, (outs I64:$sx), (ins RC:$vx, I64:$sy), 416 defm rr : LVMbm<opcStr, "$sy, $sz", opc, RCM, (ins I64:$sy, I64:$sz)>; 432 def mr : RR<opc, (outs I64:$sx), (ins RCM:$vz, I64:$sy), 640 (ins RC:$vz, I64:$sy, I64:$sz)>; [all …]
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H A D | VEInstrInfo.td | 730 def rr : RR<opc, (outs I64:$sx), (ins CCOp:$cfw, RC:$sy, I64:$sz, I64:$sd), 735 def ir : RR<opc, (outs I64:$sx), 736 (ins CCOp:$cfw, immOp:$sy, I64:$sz, I64:$sd), 741 def rm : RR<opc, (outs I64:$sx), 747 def im : RR<opc, (outs I64:$sx), 1429 defm CVTLD : CVTRDm<"cvt.l.d", 0x4F, I64, I64>; 1437 defm CVTDL : CVTm<"cvt.d.l", 0x5F, I64, f64, I64, i64, sint_to_fp>; 1491 defm BSIC : RMm<"bsic", 0x08, I64>; 1624 def : Pat<(lea_add I64:$base, I64:$idx, simm32:$disp), 1628 def : Pat<(lea_add I64:$base, I64:$idx, lozero:$disp), [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonPatterns.td | 900 def: Pat<(select I1:$Pu, I64:$Rs, I64:$Rt), 978 def: OpR_RR_pat<A2_minp, Smin, i64, I64, I64>; 979 def: OpR_RR_pat<A2_maxp, Smax, i64, I64, I64>; 980 def: OpR_RR_pat<A2_minup, Umin, i64, I64, I64>; 981 def: OpR_RR_pat<A2_maxup, Umax, i64, I64, I64>; 1433 def: Pat<(abs I64:$Rs), (A2_absp I64:$Rs)>; 1435 def: Pat<(not I64:$Rs), (A2_notp I64:$Rs)>; 1436 def: Pat<(ineg I64:$Rs), (A2_negp I64:$Rs)>; 1648 def: AccRRR_pat<M4_xor_xacc, Xor, Su<Xor>, I64, I64, I64>; 1725 def: Pat<(mul I64:$Rss, I64:$Rtt), [all …]
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H A D | HexagonIntrinsics.td | 20 : Pat <(IntID I32:$Rs, I64:$Rt), 21 (MI I32:$Rs, I64:$Rt)>; 95 (A2_combinew (HiReg I64:$Rs), (LoReg I64:$Rs))>; 96 def : Pat <(int_hexagon_S5_vasrhrnd_goodsyntax I64:$Rs, (i32 0)), 97 (A2_combinew (HiReg I64:$Rs), (LoReg I64:$Rs))>; 99 (S2_vsathub I64:$Rs)>; 105 (S2_asr_i_p_rnd I64:$Rs, (UDEC1 u6_0ImmPred:$imm))>; 107 (S5_vasrhrnd I64:$Rs, (UDEC1 u4_0ImmPred:$imm))>; 109 (S5_asrhub_rnd_sat I64:$Rs, (UDEC1 u4_0ImmPred:$imm))>; 179 def : Pat<(int_hexagon_S4_stored_locked I32:$Rs, I64:$Rt), [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/Utils/ |
H A D | WebAssemblyTypeUtilities.cpp | 30 return wasm::ValType::I64; in parseType() 49 .Case("i64", WebAssembly::BlockType::I64) in parseBlockType() 130 return wasm::ValType::I64; in toValType() 156 return wasm::ValType::I64; in regClassToValType()
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H A D | WebAssemblyTypeUtilities.h | 34 I64 = unsigned(wasm::ValType::I64), enumerator
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/openbsd/gnu/llvm/llvm/lib/Target/DirectX/ |
H A D | DXILOpBuilder.cpp | 35 I64 = 1 << 8, enumerator 58 case OverloadKind::I64: in getOverloadTypeName() 93 return OverloadKind::I64; in getOverloadKind() 208 case ParameterKind::I64: in getTypeFromParameterKind() 293 case OverloadKind::I64: in getOverloadTy()
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H A D | DXILResource.h | 58 I64, enumerator
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H A D | DXILResource.cpp | 81 case ComponentType::I64: in getComponentTypeName() 290 .Case("int64_t", ComponentType::I64) in parseSourceType()
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/openbsd/gnu/llvm/llvm/include/llvm/Support/ |
H A D | DXILOperationCommon.h | 35 I64, enumerator 52 .Case("i64", ParameterKind::I64) in parameterTypeNameToKind()
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/openbsd/gnu/gcc/gcc/config/alpha/ |
H A D | vms.h | 169 enum avms_arg_type {I64, FF, FD, FG, FS, FT}; enumerator 182 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \ 183 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64;
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/openbsd/gnu/usr.bin/gcc/gcc/config/alpha/ |
H A D | vms.h | 170 enum avms_arg_type {I64, FF, FD, FG, FS, FT}; enumerator 183 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \ 184 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64;
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/openbsd/gnu/llvm/llvm/lib/Demangle/ |
H A D | RustDemangle.cpp | 45 I64, enumerator 446 Type = BasicType::I64; in parseBasicType() 476 case BasicType::I64: in printBasicType() 742 case BasicType::I64: in demangleConst()
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/openbsd/gnu/usr.bin/binutils/opcodes/ |
H A D | mips-opc.c | 88 #define I64 INSN_ISA64 macro 479 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, I64|N55 }, 480 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, I64|N55 }, 534 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 }, 535 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 }, 537 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 }, 538 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 }, 544 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 }, 546 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 }, 548 {"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 }, [all …]
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/openbsd/gnu/usr.bin/binutils-2.17/opcodes/ |
H A D | mips-opc.c | 88 #define I64 INSN_ISA64 macro 509 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, 510 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, 564 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 }, 565 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 }, 569 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 }, 570 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 }, 578 {"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, 0, I64 }, 580 {"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, 0, I64 }, 1284 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I64 }, [all …]
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