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Searched refs:PORT_D (Results 1 – 22 of 22) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/gvt/
H A Ddisplay.c453 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_D)) { in emulate_monitor_status_change()
455 ~DPLL_CTRL2_DDI_CLK_OFF(PORT_D); in emulate_monitor_status_change()
457 DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_D); in emulate_monitor_status_change()
459 DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_D); in emulate_monitor_status_change()
466 (PORT_D << TRANS_DDI_PORT_SHIFT) | in emulate_monitor_status_change()
469 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &= in emulate_monitor_status_change()
471 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |= in emulate_monitor_status_change()
474 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
475 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
766 clean_virtual_dp_monitor(vgpu, PORT_D); in intel_vgpu_clean_display()
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H A Dedid.c93 port = PORT_D; in cnp_get_port_from_gmbus0()
109 port = PORT_D; in bxt_get_port_from_gmbus0()
125 port = PORT_D; in get_port_from_gmbus0()
H A Dvgpu.c377 ret = intel_gvt_set_edid(vgpu, PORT_D); in intel_gvt_create_vgpu()
H A Dhandlers.c656 if (port != PORT_B && port != PORT_D) { in vgpu_update_refresh_rate()
2345 MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2351 MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write); in init_generic_mmio_info()
2357 MMIO_DH(DP_TP_STATUS(PORT_D), D_ALL, NULL, dp_tp_status_mmio_write); in init_generic_mmio_info()
/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_display_limits.h81 PORT_D, enumerator
89 PORT_TC1 = PORT_D,
H A Dintel_display_device.c316 ….__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D…
323 ….__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D…
337 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDV…
359 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
373 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
408 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
428 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
444 .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */
468 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
554 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
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H A Dintel_pch_display.c82 assert_pch_dp_disabled(dev_priv, pipe, PORT_D, PCH_DP_D); in assert_pch_ports_disabled()
97 assert_pch_hdmi_disabled(dev_priv, pipe, PORT_D, PCH_HDMID); in assert_pch_ports_disabled()
166 ibx_sanitize_pch_dp_port(dev_priv, PORT_D, PCH_DP_D); in ibx_sanitize_pch_ports()
171 ibx_sanitize_pch_hdmi_port(dev_priv, PORT_D, PCH_HDMID); in ibx_sanitize_pch_ports()
433 drm_WARN_ON(&dev_priv->drm, port < PORT_B || port > PORT_D); in ilk_pch_enable()
H A Dg4x_hdmi.c667 return port == PORT_B || port == PORT_C || port == PORT_D; in is_hdmi_port_valid()
755 if (port == PORT_D) in g4x_hdmi_init()
H A Dintel_combo_phy.c167 bool ddi_d_present = intel_bios_is_port_present(i915, PORT_D); in ehl_vbt_ddi_d_present()
H A Dintel_dpio_phy.c648 case PORT_D: in vlv_dig_port_to_channel()
664 case PORT_D: in vlv_dig_port_to_phy()
H A Dintel_pipe_crc.c109 case PORT_D: in i9xx_pipe_crc_auto_source()
H A Dintel_display.h139 case PORT_D: in port_identifier()
H A Dintel_display.c377 case PORT_D: in vlv_wait_port_ready()
1805 port == PORT_D) in intel_port_to_phy()
7459 dpd_is_edp = intel_dp_is_port_edp(dev_priv, PORT_D); in intel_setup_outputs()
7477 g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D); in intel_setup_outputs()
7483 g4x_dp_init(dev_priv, PCH_DP_D, PORT_D); in intel_setup_outputs()
7524 has_port = intel_bios_is_port_present(dev_priv, PORT_D); in intel_setup_outputs()
7526 g4x_dp_init(dev_priv, CHV_DP_D, PORT_D); in intel_setup_outputs()
7528 g4x_hdmi_init(dev_priv, CHV_HDMID, PORT_D); in intel_setup_outputs()
7575 g4x_dp_init(dev_priv, DP_D, PORT_D); in intel_setup_outputs()
H A Dintel_pps.c1525 case PORT_D: in pps_init_registers()
1701 g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe); in assert_pps_unlocked()
H A Dintel_hdmi.c2719 case PORT_D: in chv_port_to_ddc_pin()
2761 case PORT_D: in cnp_port_to_ddc_pin()
2880 case PORT_D: in g4x_port_to_ddc_pin()
H A Dintel_ddi.c3126 [PORT_D] = TRANSCODER_C, in gen9_chicken_trans_reg_by_port()
4606 if (port == PORT_D) in ehl_hpd_pin()
4676 case PORT_D: in port_strap_detected()
4808 port_name(port - PORT_D_XELPD + PORT_D), in intel_ddi_init()
H A Dg4x_dp.c1361 if (port == PORT_D) in g4x_dp_init()
H A Dintel_bios.c2316 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, in dvo_port_to_port()
2829 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); in init_vbt_missing_defaults()
H A Dintel_hdcp.c368 case PORT_D: in intel_hdcp_get_repeater_ctl()
H A Dintel_dpll_mgr.c3217 if (port == PORT_D || port == PORT_E) { in icl_get_combo_phy_dpll()
/openbsd/sys/dev/pci/drm/i915/
H A Dintel_device_info.c244 DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D); in intel_device_info_subplatform_init()
251 DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D); in intel_device_info_subplatform_init()
H A Dintel_gvt_mmio_table.c485 MMIO_D(PORT_CLK_SEL(PORT_D)); in iterate_generic_mmio()
516 MMIO_D(DDI_BUF_CTL(PORT_D)); in iterate_generic_mmio()
521 MMIO_D(DP_TP_CTL(PORT_D)); in iterate_generic_mmio()
526 MMIO_D(DP_TP_STATUS(PORT_D)); in iterate_generic_mmio()