Searched refs:bitmask (Results 1 – 17 of 17) sorted by relevance
/qemu/hw/display/ |
H A D | cirrus_vga_rop2.h | 109 unsigned bitmask; in glue() local 128 bitmask = 0x80 >> srcskipleft; in glue() 132 if ((bitmask & 0xff) == 0) { in glue() 133 bitmask = 0x80; in glue() 136 index = (bits & bitmask); in glue() 141 bitmask >>= 1; in glue() 159 unsigned bitmask; in glue() local 166 bitmask = 0x80 >> srcskipleft; in glue() 170 if ((bitmask & 0xff) == 0) { in glue() 171 bitmask = 0x80; in glue() [all …]
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/qemu/hw/ssi/ |
H A D | pl022.c | 108 s->rx_fifo[o] = val & s->bitmask; in pl022_xfer() 171 s->bitmask = (1 << ((value & 15) + 1)) - 1; in pl022_write() 184 s->tx_fifo[s->tx_fifo_head] = value & s->bitmask; in pl022_write() 255 VMSTATE_UINT32(bitmask, PL022State),
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/qemu/util/ |
H A D | aio-win32.c | 93 long bitmask = 0; in aio_set_fd_handler() local 115 bitmask |= FD_READ | FD_ACCEPT | FD_CLOSE; in aio_set_fd_handler() 119 bitmask |= FD_WRITE | FD_CONNECT; in aio_set_fd_handler() 124 qemu_socket_select(fd, event, bitmask, NULL); in aio_set_fd_handler()
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H A D | thread-context.c | 177 struct bitmask *tmp_cpus; in thread_context_set_node_affinity()
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/qemu/rust/qemu-api/src/ |
H A D | device_class.rs | 41 bitmask: 0, 62 bitmask: 0,
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/qemu/include/hw/ssi/ |
H A D | pl022.h | 37 uint32_t bitmask; member
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/qemu/system/ |
H A D | trace-events | 22 global_dirty_changed(unsigned int bitmask) "bitmask 0x%"PRIx32
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/qemu/include/hw/ |
H A D | qdev-properties.h | 20 uint64_t bitmask; member 115 .bitmask = (_bitmask), \
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/qemu/docs/interop/ |
H A D | vhost-user-gpu.rst | 197 Get the supported protocol features bitmask. 204 Enable protocol features using a bitmask.
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H A D | vhost-user.rst | 1064 Get from the underlying vhost implementation the features bitmask. 1076 bitmask. Feature bit ``VHOST_USER_F_PROTOCOL_FEATURES`` signals 1086 Get the protocol feature bitmask from the underlying vhost
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/qemu/target/arm/ |
H A D | ptw.c | 2657 uint32_t bitmask; in pmsav8_mpu_lookup() local 2659 bitmask = 0x1f; in pmsav8_mpu_lookup() 2661 bitmask = 0x3f; in pmsav8_mpu_lookup() 2673 uint32_t base = regime_rbar(env, mmu_idx, secure)[n] & ~bitmask; in pmsav8_mpu_lookup() 2674 uint32_t limit = regime_rlar(env, mmu_idx, secure)[n] | bitmask; in pmsav8_mpu_lookup()
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/qemu/hw/core/ |
H A D | qdev-properties.c | 439 if (*ptr & ~prop->bitmask) { in set_uint64_checkmask() 441 name, prop->bitmask); in set_uint64_checkmask()
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/qemu/linux-user/ |
H A D | gen-vdso-elfn.c.inc | 278 break; /* DT_PPC64_OPT: integer bitmask */
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/qemu/hw/usb/ |
H A D | hcd-dwc2.c | 61 #define get_bit(data, bitmask) \ argument 62 (!!((data) & (bitmask)))
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/qemu/target/arm/tcg/ |
H A D | sve.decode | 193 # Two register operand, one encoded bitmask. 525 # SVE broadcast bitmask immediate
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/qemu/target/i386/kvm/ |
H A D | kvm.c | 440 uint64_t bitmask; in kvm_arch_get_supported_cpuid() local 530 .addr = (unsigned long) &bitmask in kvm_arch_get_supported_cpuid() 546 ret = (reg == R_EAX) ? bitmask : bitmask >> 32; in kvm_arch_get_supported_cpuid()
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/qemu/target/ppc/ |
H A D | translate.c | 3826 uint8_t bitmask; \ 3846 bitmask = 0x08 >> (crbD(ctx->opcode) & 0x03); \ 3847 tcg_gen_andi_i32(t0, t0, bitmask); \ 3848 tcg_gen_andi_i32(t1, cpu_crf[crbD(ctx->opcode) >> 2], ~bitmask); \
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