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Searched refs:bitmask (Results 1 – 17 of 17) sorted by relevance

/qemu/hw/display/
H A Dcirrus_vga_rop2.h109 unsigned bitmask; in glue() local
128 bitmask = 0x80 >> srcskipleft; in glue()
132 if ((bitmask & 0xff) == 0) { in glue()
133 bitmask = 0x80; in glue()
136 index = (bits & bitmask); in glue()
141 bitmask >>= 1; in glue()
159 unsigned bitmask; in glue() local
166 bitmask = 0x80 >> srcskipleft; in glue()
170 if ((bitmask & 0xff) == 0) { in glue()
171 bitmask = 0x80; in glue()
[all …]
/qemu/hw/ssi/
H A Dpl022.c108 s->rx_fifo[o] = val & s->bitmask; in pl022_xfer()
171 s->bitmask = (1 << ((value & 15) + 1)) - 1; in pl022_write()
184 s->tx_fifo[s->tx_fifo_head] = value & s->bitmask; in pl022_write()
255 VMSTATE_UINT32(bitmask, PL022State),
/qemu/util/
H A Daio-win32.c93 long bitmask = 0; in aio_set_fd_handler() local
115 bitmask |= FD_READ | FD_ACCEPT | FD_CLOSE; in aio_set_fd_handler()
119 bitmask |= FD_WRITE | FD_CONNECT; in aio_set_fd_handler()
124 qemu_socket_select(fd, event, bitmask, NULL); in aio_set_fd_handler()
H A Dthread-context.c177 struct bitmask *tmp_cpus; in thread_context_set_node_affinity()
/qemu/rust/qemu-api/src/
H A Ddevice_class.rs41 bitmask: 0,
62 bitmask: 0,
/qemu/include/hw/ssi/
H A Dpl022.h37 uint32_t bitmask; member
/qemu/system/
H A Dtrace-events22 global_dirty_changed(unsigned int bitmask) "bitmask 0x%"PRIx32
/qemu/include/hw/
H A Dqdev-properties.h20 uint64_t bitmask; member
115 .bitmask = (_bitmask), \
/qemu/docs/interop/
H A Dvhost-user-gpu.rst197 Get the supported protocol features bitmask.
204 Enable protocol features using a bitmask.
H A Dvhost-user.rst1064 Get from the underlying vhost implementation the features bitmask.
1076 bitmask. Feature bit ``VHOST_USER_F_PROTOCOL_FEATURES`` signals
1086 Get the protocol feature bitmask from the underlying vhost
/qemu/target/arm/
H A Dptw.c2657 uint32_t bitmask; in pmsav8_mpu_lookup() local
2659 bitmask = 0x1f; in pmsav8_mpu_lookup()
2661 bitmask = 0x3f; in pmsav8_mpu_lookup()
2673 uint32_t base = regime_rbar(env, mmu_idx, secure)[n] & ~bitmask; in pmsav8_mpu_lookup()
2674 uint32_t limit = regime_rlar(env, mmu_idx, secure)[n] | bitmask; in pmsav8_mpu_lookup()
/qemu/hw/core/
H A Dqdev-properties.c439 if (*ptr & ~prop->bitmask) { in set_uint64_checkmask()
441 name, prop->bitmask); in set_uint64_checkmask()
/qemu/linux-user/
H A Dgen-vdso-elfn.c.inc278 break; /* DT_PPC64_OPT: integer bitmask */
/qemu/hw/usb/
H A Dhcd-dwc2.c61 #define get_bit(data, bitmask) \ argument
62 (!!((data) & (bitmask)))
/qemu/target/arm/tcg/
H A Dsve.decode193 # Two register operand, one encoded bitmask.
525 # SVE broadcast bitmask immediate
/qemu/target/i386/kvm/
H A Dkvm.c440 uint64_t bitmask; in kvm_arch_get_supported_cpuid() local
530 .addr = (unsigned long) &bitmask in kvm_arch_get_supported_cpuid()
546 ret = (reg == R_EAX) ? bitmask : bitmask >> 32; in kvm_arch_get_supported_cpuid()
/qemu/target/ppc/
H A Dtranslate.c3826 uint8_t bitmask; \
3846 bitmask = 0x08 >> (crbD(ctx->opcode) & 0x03); \
3847 tcg_gen_andi_i32(t0, t0, bitmask); \
3848 tcg_gen_andi_i32(t1, cpu_crf[crbD(ctx->opcode) >> 2], ~bitmask); \