Home
last modified time | relevance | path

Searched refs:FP_FR (Results 1 – 21 of 21) sorted by relevance

/dports/emulators/simh/simh-3.9.0_5/HP2100/
H A Dhp2100_fp.c106 #define FP_FR (FP_M_FR << FP_V_FR) macro
300 fop->fr = opnd & FP_FR; /* get frac */ in UnpackFP()
325 return (fop->fr & FP_FR) | /* merge frac */ in PackFP()
339 fop->fr = (fop->fr + (sign? FP_RNDM: FP_RNDP)) & FP_FR; /* round */ in StoreFP()
/dports/emulators/simh-hpdoc/simh-hpdoc-3.11.0/SCP/HP2100/
H A Dhp2100_cpu_fp.c114 #define FP_FR (FP_M_FR << FP_V_FR) macro
309 fop->fr = opnd & FP_FR; /* get frac */ in UnpackFP()
334 return (fop->fr & FP_FR) | /* merge frac */ in PackFP()
348 fop->fr = (fop->fr + (sign? FP_RNDM: FP_RNDP)) & FP_FR; /* round */ in StoreFP()
/dports/emulators/simh-hp2100/simh-hp2100-3.11.0.31/SCP/HP2100/
H A Dhp2100_cpu_fp.c114 #define FP_FR (FP_M_FR << FP_V_FR) macro
309 fop->fr = opnd & FP_FR; /* get frac */ in UnpackFP()
334 return (fop->fr & FP_FR) | /* merge frac */ in PackFP()
348 fop->fr = (fop->fr + (sign? FP_RNDM: FP_RNDP)) & FP_FR; /* round */ in StoreFP()
/dports/audio/dssi/dssi-1.1.1/examples/
H A Dless_trivial_synth.c49 #define FP_FR(x) ((float)x.part.fr * 0.0000152587890625f) macro
313 LERP(FP_FR(d->phase), table[0][FP_IN(d->phase)], in run_voice()
315 LERP(FP_FR(d->phase), table[1][FP_IN(d->phase)], in run_voice()
/dports/emulators/qemu-utils/qemu-4.2.1/target/ppc/
H A Dcpu.h652 #define FP_FR (1ull << FPSCR_FR) macro
675 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu5/qemu-5.2.0/target/ppc/
H A Dcpu.h677 #define FP_FR (1ull << FPSCR_FR) macro
700 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/ppc/
H A Dcpu.h647 #define FP_FR (1ull << FPSCR_FR) macro
670 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu42/qemu-4.2.1/target/ppc/
H A Dcpu.h652 #define FP_FR (1ull << FPSCR_FR) macro
675 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/ppc/
H A Dcpu.h647 #define FP_FR (1ull << FPSCR_FR) macro
670 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu60/qemu-6.0.0/target/ppc/
H A Dcpu.h677 #define FP_FR (1ull << FPSCR_FR) macro
700 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/ppc/
H A Dcpu.h707 #define FP_FR (1ull << FPSCR_FR) macro
730 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI);
305 env->fpscr &= ~(FP_FR | FP_FI);
318 env->fpscr &= ~(FP_FR | FP_FI);
/dports/emulators/qemu/qemu-6.2.0/target/ppc/
H A Dcpu.h731 #define FP_FR (1ull << FPSCR_FR) macro
754 #define FP_STATUS (FP_FR | FP_FI | FP_FPRF)
H A Dfpu_helper.c218 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
305 env->fpscr &= ~(FP_FR | FP_FI); in float_invalid_op_vxcvi()
318 env->fpscr &= ~(FP_FR | FP_FI); in float_zero_divide_excp()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/ppc/
H A Dcpu.h681 #define FP_FR (1ull << FSPCR_FR) macro