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Searched refs:WOR (Results 1 – 25 of 222) sorted by relevance

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/dports/games/dunelegacy/dunelegacy-0.96.4/src/structures/
H A DWOR.cpp25 WOR::WOR(House* newOwner) : BuilderBase(newOwner) { in WOR() function in WOR
26 WOR::init(); in WOR()
31 WOR::WOR(InputStream& stream) : BuilderBase(stream) { in WOR() function in WOR
32 WOR::init(); in WOR()
35 void WOR::init() { in init()
50 WOR::~WOR() { in ~WOR()
/dports/games/dunelegacy/dunelegacy-0.96.4/include/structures/
H A DWOR.h23 class WOR : public BuilderBase
26 explicit WOR(House* newOwner);
27 explicit WOR(InputStream& stream);
29 virtual ~WOR();
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-93/billowitch/compliant/
H A Dtc1208.vhd35 type WOR is array (0 to 3) of BIT; type
36 signal TS : WOR := "0000";
/dports/math/wcalc/wcalc-2.5/src/common/
H A Dparser.h88 WOR = 298, enumerator
200 #define WOR 298 macro
/dports/cad/tkgate/tkgate-2.1/test/verga/
H A Dwire1.out1 WIRE WOR WAND TRI0 TRI1
12 WIRE WOR WAND TRI0 TRI1
H A Dverga.out1 WIRE WOR WAND TRI0 TRI1
12 WIRE WOR WAND TRI0 TRI1
/dports/lang/mdk/mdk-1.3.0/samples/
H A Dhello.mixal9 ALF "O WOR"
/dports/cad/gplcver/gplcver-2.12a.src/vcddiff.dir/src/
H A Dvcddiff.h49 #define WOR 16 macro
/dports/games/dunelegacy/dunelegacy-0.96.4/data/maps/multiplayer/
H A D4P - 128x128 - Silicon Valley XL.ini343 ID032=Mercenary,WOR,256,6462
349 ID038=Player1,WOR,256,322
356 ID045=Player2,WOR,256,15677
364 ID053=Player3,WOR,256,7420
372 ID061=Player4,WOR,256,7686
/dports/math/reduce/Reduce-svn5758-src/psl/dist/util/ibmrs/
H A Dmuls.sl44 (*WOR (reg 3)(reg 2))
65 (*WOR (reg 2) (reg 4))
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/arm/iwmmxt/
H A Dwor.cgs1 # Intel(r) Wireless MMX(tm) technology testcase for WOR
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/arm/iwmmxt/
H A Dwor.cgs1 # Intel(r) Wireless MMX(tm) technology testcase for WOR
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/arm/iwmmxt/
H A Dwor.cgs1 # Intel(r) Wireless MMX(tm) technology testcase for WOR
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/arm/iwmmxt/
H A Dwor.cgs1 # Intel(r) Wireless MMX(tm) technology testcase for WOR
/dports/games/freedroidrpg/freedroidrpg-0.16.1/map/
H A DReturnOfTux.droids5 T=WOR: PosX=63 PosY=44 Faction="resistance" UseDialog="Peter" ShortLabel=_"Peter - Imprisoned Rebel…
12 T=WOR: PosX=75 PosY=80 Faction="civilian" UseDialog="Bruce" ShortLabel=_"Mine Worker" Marker=9999 R…
14 T=WOR: PosX=9 PosY=46 Faction="civilian" UseDialog="Duncan" ShortLabel=_"Sketchy Guy" Marker=9999 R…
15 T=WOR: PosX=63 PosY=17 Faction="civilian" UseDialog="Skippy" ShortLabel=_"Guy with Hat" Marker=9999…
213 T=WOR: PosX=63 PosY=33 Faction="ms" UseDialog="AfterTakeover" ShortLabel=_"WOR" Marker=1024 RushTux…
244 T=WOR: PosX=40 PosY=20 Faction="civilian" UseDialog="Dude" ShortLabel=_"Dude" Marker=2024 RushTux=0…
269 T=WOR: PosX=49 PosY=54 Faction="civilian" UseDialog="John" ShortLabel=_"John" Marker=2028 RushTux=0…
338 T=WOR: PosX=22 PosY=16 Faction="civilian" UseDialog="Koan" ShortLabel=_"Koan" Marker=1034 RushTux=0…
458 T=WOR: PosX=68 PosY=9 Faction="ms" UseDialog="AfterTakeover" ShortLabel=_"Worker" Marker=1050 RushT…
459 T=WOR: PosX=72 PosY=18 Faction="ms" UseDialog="AfterTakeover" ShortLabel=_"Worker" Marker=1050 Rush…
[all …]
/dports/cad/openroad/OpenROAD-2.0/src/sta/verilog/
H A DVerilogParse.yy50 %token WIRE WAND WOR TRI INPUT OUTPUT INOUT SUPPLY1 SUPPLY0 REG
57 %type <ival> WIRE WAND WOR TRI INPUT OUTPUT INOUT SUPPLY1 SUPPLY0
301 | WOR { $$ = sta::PortDirection::internal(); }
/dports/math/reduce/Reduce-svn5758-src/psl/dist/util/macg4/
H A Dmuls.sl49 (*WOR (reg 3)(reg 2))
104 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/util/macg5/
H A Dmuls.sl49 (*WOR (reg 3)(reg 2))
104 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/AMD64_ext/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/win32/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/macintel64/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/mingw-w64/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/AMD64/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/freeBSD64/
H A Dmuls.sl55 (*WOR (reg 3)(reg 2))
74 (*WOR (reg 2) (reg 4))
/dports/math/reduce/Reduce-svn5758-src/psl/dist/comp/macintel/
H A Dmuls.sl56 (*WOR (reg 3)(reg 2))
75 (*WOR (reg 2) (reg 4))

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