/dports/emulators/mess/mame-mame0226/src/devices/cpu/alpha/ |
H A D | alphad.cpp | 329 MEMORY_R("lda", Ra(instruction), Disp_M(instruction), Rb(instruction)); // LDA in disassemble() 353 OPERATE_RRR("addl", Ra(instruction), Rb(instruction), Rc(instruction)); // ADDL in disassemble() 360 OPERATE_RRR("subl", Ra(instruction), Rb(instruction), Rc(instruction)); // SUBL in disassemble() 373 OPERATE_RRR("subq", Ra(instruction), Rb(instruction), Rc(instruction)); // SUBQ in disassemble() 458 if (Ra(instruction) == 31 && Rb(instruction) == 31 && Rc(instruction) == 31) in disassemble() 465 OPERATE_RRR("bis", Ra(instruction), Rb(instruction), Rc(instruction)); // BIS in disassemble() 492 OPERATE_RIR("bis", Ra(instruction), Im(instruction), Rc(instruction)); // BIS in disassemble() 1015 if (Ra(instruction) == 31 && Rb(instruction) == 31 && Rc(instruction) == 31) in disassemble() 1027 if (Ra(instruction) == Rb(instruction)) in disassemble() 1034 if (Ra(instruction) == Rb(instruction) && Rb(instruction) == Rc(instruction)) in disassemble() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/alpha/ |
H A D | alphad.cpp | 329 MEMORY_R("lda", Ra(instruction), Disp_M(instruction), Rb(instruction)); // LDA in disassemble() 353 OPERATE_RRR("addl", Ra(instruction), Rb(instruction), Rc(instruction)); // ADDL in disassemble() 360 OPERATE_RRR("subl", Ra(instruction), Rb(instruction), Rc(instruction)); // SUBL in disassemble() 373 OPERATE_RRR("subq", Ra(instruction), Rb(instruction), Rc(instruction)); // SUBQ in disassemble() 458 if (Ra(instruction) == 31 && Rb(instruction) == 31 && Rc(instruction) == 31) in disassemble() 465 OPERATE_RRR("bis", Ra(instruction), Rb(instruction), Rc(instruction)); // BIS in disassemble() 492 OPERATE_RIR("bis", Ra(instruction), Im(instruction), Rc(instruction)); // BIS in disassemble() 1015 if (Ra(instruction) == 31 && Rb(instruction) == 31 && Rc(instruction) == 31) in disassemble() 1027 if (Ra(instruction) == Rb(instruction)) in disassemble() 1034 if (Ra(instruction) == Rb(instruction) && Rb(instruction) == Rc(instruction)) in disassemble() [all …]
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/dports/devel/openocd/openocd-0.11.0/src/target/ |
H A D | nds32_disassembler.c | 116 &(instruction->info.ra), &(instruction->info.imm)); in nds32_parse_group_0_insn() 121 instruction->access_start += instruction->info.imm; in nds32_parse_group_0_insn() 128 opcode, instruction->info.rt, instruction->info.ra, in nds32_parse_group_0_insn() 138 instruction->access_start += instruction->info.imm; in nds32_parse_group_0_insn() 155 instruction->access_start += instruction->info.imm; in nds32_parse_group_0_insn() 401 instruction->info.ra, instruction->info.imm); in nds32_parse_group_2_insn() 565 instruction->info.ra, instruction->info.rb, in nds32_parse_mem() 622 instruction->info.ra, instruction->info.rb, in nds32_parse_mem() 660 instruction->info.ra, instruction->info.rb, in nds32_parse_mem() 734 instruction->info.ra, instruction->info.rb, in nds32_parse_mem() [all …]
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/dports/devel/redasm/REDasm-2.1.1/LibREDasm/redasm/assemblers/chip8/ |
H A D | chip8.cpp | 33 instruction->id = opcode; in decodeInstruction() 34 instruction->size = sizeof(u16); in decodeInstruction() 50 …else if((instruction->mnemonic == "ske") || (instruction->mnemonic == "skne") || (instruction->mne… in onDecoded() 64 else if((instruction->mnemonic == "mov") || (instruction->mnemonic == "ldra")) in onDecoded() 104 instruction->targetIdx(0); in decode1xxx() 112 instruction->targetIdx(0); in decode2xxx() 121 instruction->target(instruction->endAddress() + instruction->size); in decode3xxx() 130 instruction->target(instruction->endAddress() + instruction->size); in decode4xxx() 142 instruction->target(instruction->endAddress() + instruction->size); in decode5xxx() 203 instruction->target(instruction->endAddress() + instruction->size); in decode9xxx() [all …]
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/dports/www/firefox/firefox-99.0/third_party/rust/naga/src/back/spv/ |
H A D | instructions.rs | 28 instruction in source() 35 instruction in name() 43 instruction in member_name() 61 instruction in decorate() 77 instruction in member_decorate() 87 instruction in extension() 94 instruction in ext_inst_import() 112 instruction in ext_inst() 126 instruction in memory_model() 144 instruction in entry_point() [all …]
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/dports/devel/redasm/REDasm-2.1.1/LibREDasm/redasm/assemblers/dalvik/ |
H A D | dalvik.cpp | 59 instruction->id = id; in decodeOp0() 68 instruction->id = id; in decodeOp1() 78 instruction->id = id; in decodeOp2() 88 instruction->id = id; in decodeOp3() 100 instruction->id = id; in decodeOp2_s() 110 instruction->id = id; in decodeOp2_t() 120 instruction->id = id; in decodeOp2_f() 131 instruction->id = id; in decodeOp2_16() 142 instruction->id = id; in decodeOp2_16_16() 153 instruction->id = id; in decodeOp2_imm4() [all …]
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/dports/emulators/qemu/qemu-6.2.0/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu42/qemu-4.2.1/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu60/qemu-6.0.0/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu5/qemu-5.2.0/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/ |
H A D | nanomips.h | 44 instruction, enumerator 255 bool MOVE_cond(uint64 instruction); 258 bool PREFE_cond(uint64 instruction); 259 bool SLTU_cond(uint64 instruction); 267 std::string ADD(uint64 instruction); 347 std::string CLO(uint64 instruction); 348 std::string CLZ(uint64 instruction); 436 std::string DI(uint64 instruction); 492 std::string EI(uint64 instruction); 569 std::string LL(uint64 instruction); [all …]
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/dports/mail/thunderbird/thunderbird-91.8.0/third_party/rust/naga/src/back/spv/ |
H A D | instructions.rs | 28 instruction in source() 35 instruction in name() 43 instruction in member_name() 61 instruction in decorate() 77 instruction in member_decorate() 87 instruction in extension() 94 instruction in ext_inst_import() 112 instruction in ext_inst() 126 instruction in memory_model() 144 instruction in entry_point() [all …]
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/dports/www/firefox-esr/firefox-91.8.0/third_party/rust/naga/src/back/spv/ |
H A D | instructions.rs | 28 instruction in source() 35 instruction in name() 43 instruction in member_name() 61 instruction in decorate() 77 instruction in member_decorate() 87 instruction in extension() 94 instruction in ext_inst_import() 112 instruction in ext_inst() 126 instruction in memory_model() 144 instruction in entry_point() [all …]
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/dports/lang/mono/mono-5.10.1.57/external/linker/cecil/rocks/Mono.Cecil.Rocks/ |
H A D | MethodBodyRocks.cs | 31 switch (instruction.OpCode.Code) { in SimplifyMacros() 117 ExpandMacro (instruction, OpCodes.Ldc_I4, (int) (sbyte) instruction.Operand); in SimplifyMacros() 167 instruction.OpCode = opcode; in ExpandMacro() 173 instruction.OpCode = opcode; in MakeMacro() 174 instruction.Operand = null; in MakeMacro() 232 ExpandMacro (instruction, OpCodes.Ldarg_S, instruction.Operand); in OptimizeMacros() 253 ExpandMacro (instruction, OpCodes.Ldloc_S, instruction.Operand); in OptimizeMacros() 274 ExpandMacro (instruction, OpCodes.Stloc_S, instruction.Operand); in OptimizeMacros() 285 ExpandMacro (instruction, OpCodes.Ldarga_S, instruction.Operand); in OptimizeMacros() 289 ExpandMacro (instruction, OpCodes.Ldloca_S, instruction.Operand); in OptimizeMacros() [all …]
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/dports/lang/mono/mono-5.10.1.57/external/cecil/rocks/Mono.Cecil.Rocks/ |
H A D | MethodBodyRocks.cs | 31 switch (instruction.OpCode.Code) { in SimplifyMacros() 117 ExpandMacro (instruction, OpCodes.Ldc_I4, (int) (sbyte) instruction.Operand); in SimplifyMacros() 167 instruction.OpCode = opcode; in ExpandMacro() 173 instruction.OpCode = opcode; in MakeMacro() 174 instruction.Operand = null; in MakeMacro() 232 ExpandMacro (instruction, OpCodes.Ldarg_S, instruction.Operand); in OptimizeMacros() 253 ExpandMacro (instruction, OpCodes.Ldloc_S, instruction.Operand); in OptimizeMacros() 274 ExpandMacro (instruction, OpCodes.Stloc_S, instruction.Operand); in OptimizeMacros() 285 ExpandMacro (instruction, OpCodes.Ldarga_S, instruction.Operand); in OptimizeMacros() 289 ExpandMacro (instruction, OpCodes.Ldloca_S, instruction.Operand); in OptimizeMacros() [all …]
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/imagination/vulkan/pds/ |
H A D | pvr_pds_disasm.c | 57 error.instruction = error.instruction; in error_reg_range() 304 add->src0->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add64() 311 add->src1->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add64() 318 add->dst->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add64() 345 add->src0->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add32() 352 add->src1->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add32() 359 add->dst->instruction = &add->instruction; in pvr_pds_disassemble_instruction_add32() 391 stm->src0->instruction = &stm->instruction; in pvr_pds_disassemble_instruction_stm() 399 stm->src1->instruction = &stm->instruction; in pvr_pds_disassemble_instruction_stm() 456 ins->dst->instruction = &ins->instruction; in pvr_pds_disassemble_instruction_sftlp32() [all …]
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/dports/lang/mono/mono-5.10.1.57/external/cecil-legacy/rocks/Mono.Cecil.Rocks/ |
H A D | MethodBodyRocks.cs | 135 ExpandMacro (instruction, OpCodes.Ldc_I4, (int) (sbyte) instruction.Operand); in SimplifyMacros() 185 instruction.OpCode = opcode; in ExpandMacro() 186 instruction.Operand = operand; in ExpandMacro() 191 instruction.OpCode = opcode; in MakeMacro() 192 instruction.Operand = null; in MakeMacro() 227 ExpandMacro (instruction, OpCodes.Ldarg_S, instruction.Operand); in OptimizeMacros() 248 ExpandMacro (instruction, OpCodes.Ldloc_S, instruction.Operand); in OptimizeMacros() 269 ExpandMacro (instruction, OpCodes.Stloc_S, instruction.Operand); in OptimizeMacros() 280 ExpandMacro (instruction, OpCodes.Ldarga_S, instruction.Operand); in OptimizeMacros() 284 ExpandMacro (instruction, OpCodes.Ldloca_S, instruction.Operand); in OptimizeMacros() [all …]
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/dports/www/firefox-esr/firefox-91.8.0/js/src/zydis/Zydis/ |
H A D | Decoder.c | 454 ZYAN_ASSERT(instruction->raw.xop.offset == instruction->length - 3); in ZydisDecodeXOP() 611 if (instruction->raw.evex.z && !instruction->raw.evex.aaa) in ZydisDecodeEVEX() 729 ZYAN_ASSERT(instruction->raw.sib.offset == instruction->length - 1); in ZydisDecodeSIB() 756 instruction->raw.disp.offset = instruction->length; in ZydisReadDisplacement() 820 instruction->raw.imm[id].offset = instruction->length; in ZydisReadImmediate() 3268 instruction->raw.modrm.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3333 instruction->raw.sib.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3932 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmMod() 3958 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmReg() 3976 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmRm() [all …]
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/dports/devel/zydis/zydis-3.1.0/src/ |
H A D | Decoder.c | 454 ZYAN_ASSERT(instruction->raw.xop.offset == instruction->length - 3); in ZydisDecodeXOP() 611 if (instruction->raw.evex.z && !instruction->raw.evex.aaa) in ZydisDecodeEVEX() 729 ZYAN_ASSERT(instruction->raw.sib.offset == instruction->length - 1); in ZydisDecodeSIB() 756 instruction->raw.disp.offset = instruction->length; in ZydisReadDisplacement() 820 instruction->raw.imm[id].offset = instruction->length; in ZydisReadImmediate() 3262 instruction->raw.modrm.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3327 instruction->raw.sib.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3926 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmMod() 3952 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmReg() 3970 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmRm() [all …]
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/dports/www/firefox/firefox-99.0/js/src/zydis/Zydis/ |
H A D | Decoder.c | 454 ZYAN_ASSERT(instruction->raw.xop.offset == instruction->length - 3); in ZydisDecodeXOP() 611 if (instruction->raw.evex.z && !instruction->raw.evex.aaa) in ZydisDecodeEVEX() 729 ZYAN_ASSERT(instruction->raw.sib.offset == instruction->length - 1); in ZydisDecodeSIB() 756 instruction->raw.disp.offset = instruction->length; in ZydisReadDisplacement() 820 instruction->raw.imm[id].offset = instruction->length; in ZydisReadImmediate() 3268 instruction->raw.modrm.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3333 instruction->raw.sib.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3932 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmMod() 3958 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmReg() 3976 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmRm() [all …]
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/dports/mail/thunderbird/thunderbird-91.8.0/js/src/zydis/Zydis/ |
H A D | Decoder.c | 454 ZYAN_ASSERT(instruction->raw.xop.offset == instruction->length - 3); in ZydisDecodeXOP() 611 if (instruction->raw.evex.z && !instruction->raw.evex.aaa) in ZydisDecodeEVEX() 729 ZYAN_ASSERT(instruction->raw.sib.offset == instruction->length - 1); in ZydisDecodeSIB() 756 instruction->raw.disp.offset = instruction->length; in ZydisReadDisplacement() 820 instruction->raw.imm[id].offset = instruction->length; in ZydisReadImmediate() 3268 instruction->raw.modrm.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3333 instruction->raw.sib.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3932 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmMod() 3958 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmReg() 3976 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmRm() [all …]
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/dports/lang/spidermonkey78/firefox-78.9.0/js/src/zydis/Zydis/ |
H A D | Decoder.c | 454 ZYAN_ASSERT(instruction->raw.xop.offset == instruction->length - 3); in ZydisDecodeXOP() 611 if (instruction->raw.evex.z && !instruction->raw.evex.aaa) in ZydisDecodeEVEX() 729 ZYAN_ASSERT(instruction->raw.sib.offset == instruction->length - 1); in ZydisDecodeSIB() 756 instruction->raw.disp.offset = instruction->length; in ZydisReadDisplacement() 820 instruction->raw.imm[id].offset = instruction->length; in ZydisReadImmediate() 3268 instruction->raw.modrm.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3333 instruction->raw.sib.offset = instruction->length; in ZydisDecodeOptionalInstructionParts() 3932 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmMod() 3958 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmReg() 3976 instruction->raw.modrm.offset = instruction->length; in ZydisNodeHandlerModrmRm() [all …]
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